Patents by Inventor Hirokazu Morimoto

Hirokazu Morimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6683671
    Abstract: Spacers are provided on the counter substrate side. Each of the spacers in the display area is provided on a counter electrode that covers a color filter layer of a given thickness formed on a light shield layer formed on a glass substrate. A spacer in the peripheral area adjacent the display area is formed on a dummy color filter layer of the given thickness formed a light shield layer on the glass substrate. The thickness of the counter electrode is negligibly small in comparison with the thickness of the color filter layer. The uniformity of cell gap can be achieved over the display area and the peripheral area.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: January 27, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hirokazu Morimoto
  • Patent number: 6535188
    Abstract: It is aimed to provide such a liquid crystal display device capable of reducing a fluctuation in thickness of liquid crystal layer and thereby capable of preventing deterioration of a displayed image such as a local deviation of a contrast ratio, in particular, in such a display device where light of display is controlled on the basis of the birefringence effect of a liquid crystal material. On a transparent insulator substrate, a single and smooth dye-accepting layer is formed by coating of resin and its patterning. On the layer, a large number of pillar-shaped spacer projections having an equal projecting dimension are uniformly distributed. Colored patterns constituting a color filter are formed on beforehand by tinting the dye-accepting layer with dyes of red, green and blue to respective predetermined region.
    Type: Grant
    Filed: July 8, 1999
    Date of Patent: March 18, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hirokazu Morimoto
  • Publication number: 20020140894
    Abstract: There is provided an LCD module including an LCD panel which includes a pair of substrates facing each other, columnar spacers formed on at least one of the substrates and configured to provide a clearance between the substrates, and a liquid crystal material filling the clearance between the substrates, and a support member supporting the panel and configured to make the panel stand during use of the module, wherein, where temperature of the panel rises from 25° C. to 50° C., the spacers keep elastically deformed by pressure applied from the substrates.
    Type: Application
    Filed: March 7, 2002
    Publication date: October 3, 2002
    Inventor: Hirokazu Morimoto
  • Patent number: 6377328
    Abstract: A liquid crystal material is held between a circuit array and counter substrates. A plurality of spacers are disposed to keep a gap between the circuit array and counter substrates substantially constant. Change in distance of the gap equivalent to constriction of the liquid crystal material due to change in temperature from 20° C. to −20° C. is less than change in height of the spacers on conditions that the pressure of 100 mN/nm2 is applied between the substrates and that the liquid crystal material is not held between the substrates.
    Type: Grant
    Filed: April 22, 1999
    Date of Patent: April 23, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hirokazu Morimoto, Tetsuya Nishino
  • Patent number: 6181406
    Abstract: A liquid crystal display device has a liquid crystal panel wherein an opposite substrate includes a plurality of pillar-shaped spacers opposing scanning lines provided on an array substrate. The spacers have distal ends which contact the scanning lines with an opposite electrode of the opposing substrate being interposed between the distal ends and the scanning lines. Each of the distal ends of the spacers has a width smaller than the width of each scanning line. Pixel electrodes have notches which are formed in those of their side edges which are opposite to the scanning lines, such that the notches are located opposite to the distal ends of the spacers. The distance between the side edges of the pixel electrode and the scanning line opposing the side edges is larger at regions around the distal ends of the spacers than other regions.
    Type: Grant
    Filed: September 2, 1998
    Date of Patent: January 30, 2001
    Assignee: Kabushiki Kaisa Toshiba
    Inventors: Hirokazu Morimoto, Takaomi Tanaka, Tetsuya Nishino, Satoru Narioka
  • Patent number: 6036568
    Abstract: On the surface of an array substrate 60, a sealing material 64 is provided so as to surround a display region, and a plurality of spacers 66 are provided in the display region. The array substrate 60 and a counter substrate 62 are vacuum held to stages 20 and 18, respectively, so that the array substrate 60 and the counter substrate 62 face each other. In one of the stages, a recessed portion 26 facing the effective region of the counter substrate 62 is formed. By evacuating the recessed portion, the effective region of the counter substrate 62 is deflected so as to go away from the effective region of the array substrate 60. In this state, the peripheral portions of the array substrate 60 and the counter substrate 62 are panel aligned with each other via the sealing material 64. Subsequently, the counter substrate 62 is positioned with respect to the array substrate 60 by means of an X-Y-.theta. stage.
    Type: Grant
    Filed: June 4, 1998
    Date of Patent: March 14, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsunori Murouchi, Satoru Narioka, Tetsuya Nishino, Hirokazu Morimoto, Takaomi Tanaka, Tadashi Honda, Hiroshi Otaguro, Hironori Takabayashi, Toshitaka Nonaka
  • Patent number: 6010384
    Abstract: Spacers are studded in line like islands at substantially regular intervals on an opposing substrate mother glass. The spacers are brought into contact with a scribe line, i.e., a crack, formed on an array substrate mother glass. When a shock is applied uniformly to the opposing substrate mother glass in a position just above the scribe line, the shock is concentrated on the spacers and transmitted to the array substrate mother glass via the spacers. As a result, the crack forming the scribe line is extended substantially perpendicular to the glass surface, so that the array substrate mother glass can be cut without generating cut defects.
    Type: Grant
    Filed: August 27, 1998
    Date of Patent: January 4, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuya Nishino, Hirokazu Morimoto, Takaomi Tanaka
  • Patent number: 5659379
    Abstract: The active matrix display device of the invention comprises an array substrate and a counter substrate carrying a counter electrode, the counter electrode 301 having first counter potential supply terminals 353-1.about.353-7 projecting from one side of the counter electrode 351 and second counter potential supply terminals 355-1.about.355-9 projecting from the other side of the counter electrode which is opposite to the above-mentioned one side, the first and second counter potential supply terminals being disposed in axially asymmetric relation to each other. In this arrangement, a power supply to the counter electrode 351 is sufficient to provide a high-quality display image and a plurality of counter substrates can be obtained from a single insulating substrate with high efficiency.
    Type: Grant
    Filed: June 23, 1995
    Date of Patent: August 19, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hirokazu Morimoto