Abstract: A method for producing a dielectric ceramic includes: shaping mixed powdery particles including a cordierite material (2MgO.2Al2O3.5SiO2) and a low-temperature-sintering material including Al, Si and Sr, the Si being partially vitrified; and firing the resultant shaped body. The method includes the step of wet-pulverizing the low-temperature-sintering material together with at least the cordierite material to prepare mixed powder particles having a median diameter D50 less than 1 ?m; and, in a process until a time of the preparation of the mixed powder particles, the low-temperature-sintering material undergoes no step of wet-pulverizing only the low-temperature-sintering material, and drying the resultant pulverized material.

Abstract: A ceramic substrate and a method for production thereof are provided, in which the ceramic substrate includes a composite of: a first ceramic layer including Sr anorthite and Al2O3 or an oxide dielectric with a dielectric constant higher than that of Al2O3; and a second ceramic layer including Sr anorthite and cordierite and having a dielectric constant lower than that of the first ceramic layer.

Abstract: A method for producing a dielectric ceramic includes: shaping mixed powdery particles including a cordierite material (2MgO.2Al2O3.5SiO2) and a low-temperature-sintering material including Al, Si and Sr, the Si being partially vitrified; and firing the resultant shaped body. The method includes the step of wet-pulverizing the low-temperature-sintering material together with at least the cordierite material to prepare mixed powder particles having a median diameter D50 less than 1 ?m; and, in a process until a time of the preparation of the mixed powder particles, the low-temperature-sintering material undergoes no step of wet-pulverizing only the low-temperature-sintering material, and drying the resultant pulverized material.

Abstract: A ceramic substrate and a method for production thereof are provided, in which the ceramic substrate includes a composite of : a first ceramic layer including Sr anorthite and Al2O3 or an oxide dielectric with a dielectric constant higher than that of Al2O3; and a second ceramic layer including Sr anorthite and cordierite and having a dielectric constant lower than that of the first ceramic layer.

Abstract: In a semiconductor chip in which LDMOSFET elements for power amplifier circuits used for a power amplifier module are formed, a source bump electrode is disposed on an LDMOSFET formation region in which a plurality of source regions, a plurality of drain regions and a plurality of gate electrodes for the LDMOSFET elements are formed. The source bump electrode is formed on a source pad mainly made of aluminum via a source conductor layer which is thicker than the source pad and mainly made of copper. No resin film is interposed between the source bump electrode and the source conductor layer.

Abstract: Each of junctions formed between a semiconductor device and a substrate comprises metal balls of Cu, or other materials and compounds of Sn and the metal balls, and the metal balls are bonded together by the compounds.

Abstract: A technology is provided which allows a reduction in the size of a semiconductor device without degrading an electromagnetic shielding effect and reliability against reflow heating. After a plurality of components are mounted over a component mounting surface of a module substrate, a resin is formed so as to cover the mounted components. Further, over surfaces (upper and side surfaces) of the resin, a shield layer including a laminated film of a Cu plating film and an Ni plating film is formed. In the shield layer, a plurality of microchannel cracks are formed randomly along grain boundaries and in a net-like configuration without being coupled to each other in a straight line, and form a plurality of paths extending from the resin to a surface of the shield layer by the microchannel cracks.

Abstract: A polycrystalline, magnetic ceramic material having a basic composition represented by the general formula of (Y3-x-y-zBiXCayGdz)(Fe5-?-?-?-?In?Al?V?Zr?)O12, wherein 0.4<x?1.5, 0.5?y?1, 0?z?0.5, y+z<1.3, 0???0.6, 0???0.45, 0.25???0.5, 0???0.25, and 0.15 ??+??0.75 each by an atomic ratio, which is predominantly composed of a phase having a garnet structure, and sinterable at a temperature of 850-1050° C.

Abstract: A semiconductor device has an external wiring for GND formed over an underside surface of a wiring substrate. A plurality of via holes connecting to the external wiring for GND are formed to penetrate the wiring substrate. A first semiconductor chip of high power consumption, including HBTs, is mounted over a principal surface of the wiring substrate. The emitter bump electrode of the first semiconductor chip is connected in common with emitter electrodes of a plurality of HBTs formed in the first semiconductor chip. The emitter bump electrode is extended in a direction in which the HBTs line up. The first semiconductor chip is mounted over the wiring substrate so that a plurality of the via holes are connected with the emitter bump electrode. A second semiconductor chip lower in heat dissipation value than the first semiconductor chip is mounted over the first semiconductor chip.

Abstract: A semiconductor device capable of reducing the thermal resistance in a flip chip packaging structure while achieving both the high radiation performance and manufacturing readiness without increasing the manufacturing cost is provided. In a semiconductor device having a semiconductor circuit for power amplification and a control circuit of the semiconductor circuit laminated on a multilayer circuit board, the semiconductor circuit for power amplification and the control circuit are aligned in parallel on the same semiconductor element, and the semiconductor element is flip-chip connected on the multilayer circuit board. Further, a second semiconductor element mounted in addition to the first semiconductor element and all components and submodules are flip-chip connected. Also, a plurality of bumps are united in order to improve the radiation performance and thermal vias of the multilayer circuit board are formed in second and lower layers of the wiring layers in the multilayer circuit board.

Abstract: A semiconductor device has an external wiring for GND formed over an underside surface of a wiring substrate. A plurality of via holes connecting to the external wiring for GND are formed to penetrate the wiring substrate. A first semiconductor chip of high power consumption, including HBTs, is mounted over a principal surface of the wiring substrate. The emitter bump electrode of the first semiconductor chip is connected in common with emitter electrodes of a plurality of HBTs formed in the first semiconductor chip. The emitter bump electrode is extended in a direction in which the HBTs line up. The first semiconductor chip is mounted over the wiring substrate so that a plurality of the via holes are connected with the emitter bump electrode. A second semiconductor chip lower in heat dissipation value than the first semiconductor chip is mounted over the first semiconductor chip.

Abstract: A semiconductor device comprising semiconductor chips each formed with plural pads at the main surface, chip parts each formed with connection terminals at both ends thereof, a module substrate on which the semiconductor chips and the chip parts are mounted, solder connection portions for connecting the chip parts and the substrate terminals of the module substrate by soldering, gold wires for connecting the pads of the semiconductor chips and corresponding substrate terminals of the module substrate, and a sealing portion formed with a low elasticity resin such as an insulative silicone resin or a low elasticity epoxy resin for covering the semiconductor chips, chip parts, solder connection portions and gold wires which prevents flow out of the solder in the solder connection portion by re-melting thereby preventing short-circuit.

Abstract: The present invention realizes strengthening of a ground of a lower-surface ground electrode of an upper semiconductor chip and miniaturization in a semiconductor module on which two semiconductor chips are mounted in a stacked manner. A lower semiconductor chip is fixed to a bottom of a recess formed in an upper surface of a module board, and an upper semiconductor chip is fixed to an upper surface of a support body made of conductor which is formed over the upper surface of the module board around the recess. External electrode terminals and a heat radiation pad are formed over a lower surface of the module board.

Abstract: Each of junctions formed between a semiconductor device and a substrate comprises metal balls of Cu, etc., and compounds of Sn and the metal balls, and the metal balls are bonded together by the compounds.

Abstract: In a dividing method according to the present invention, a wiring board formed of ceramic is forced up (upper swing) by a lower clamp claw of a clamper, and some of a protruded wiring board portion protruding from a conveying chute is pressed against a support body to perform a first division under bending stress. Thereafter, the upward-located clamper is rotatably swung (lower swing) downward to allow an upper clamp claw to press down the protruded wiring board portion, thereby performing a reverse division at the first division section again as a second division. Since the second division allows a tensile force to act on a remaining and thin non-divided resin portion, the non-divided resin portion is torn off. Thus, the perfect division is enabled. Fractionalizing is done by a one-row division and an individual division so that each semiconductor device is formed.

Abstract: In a dividing method according to the present invention, a wiring board formed of ceramic is forced up (upper swing) by a lower clamp claw of a clamper, and some of a protruded wiring board portion protruding from a conveying chute is pressed against a support body to perform a first division under bending stress. Thereafter, the upward-located clamper is rotatably swung (lower swing) downward to allow an upper clamp claw to press down the protruded wiring board portion, thereby performing a reverse division at the first division section again as a second division. Since the second division allows a tensile force to act on a remaining and thin non-divided resin portion, the non-divided resin portion is torn off. Thus, the perfect division is enabled. Fractionalizing is done by a one-row division and an individual division so that each semiconductor device is formed.

Abstract: A semiconductor device capable of reducing the thermal resistance in a flip chip packaging structure while achieving both the high radiation performance and manufacturing readiness without increasing the manufacturing cost is provided. In a semiconductor device having a semiconductor circuit for power amplification and a control circuit of the semiconductor circuit laminated on a multilayer circuit board, the semiconductor circuit for power amplification and the control circuit are aligned in parallel on the same semiconductor element, and the semiconductor element is flip-chip connected on the multilayer circuit board. Further, a second semiconductor element mounted in addition to the first semiconductor element and all components and submodules are flip-chip connected. Also, a plurality of bumps are united in order to improve the radiation performance and thermal vias of the multilayer circuit board are formed in second and lower layers of the wiring layers in the multilayer circuit board.

Abstract: The present invention realizes strengthening of a ground of a lower-surface ground electrode of an upper semiconductor chip and miniaturization in a semiconductor module on which two semiconductor chips are mounted in a stacked manner. A lower semiconductor chip is fixed to a bottom of a recess formed in an upper surface of a module board, and an upper semiconductor chip is fixed to an upper surface of a support body made of conductor which is formed over the upper surface of the module board around the recess. External electrode terminals and a heat radiation pad are formed over a lower surface of the module board.

Abstract: The present invention realizes the miniaturization of a semiconductor module. The semiconductor module includes a module board having external electrode terminals and a heat radiation pad over a lower surface thereof, a first semiconductor chip incorporating an initial-stage transistor of a high frequency power amplifying device therein, a second semiconductor chip incorporating a next-stage transistor and a final-stage transistor therein, and an integrated passive device which constitutes a matching circuit. At least one of the first semiconductor chip and the second semiconductor chip and the integrated passive device are mounted over an upper surface of the module board in an overlapped manner.

Abstract: Each of junctions formed between a semiconductor device and a substrate comprises metal balls of Cu, or other materials and compounds of Sn and the metal balls, and the metal balls are bonded together by the compounds.