Patents by Inventor Hirokazu Tsukada

Hirokazu Tsukada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11542381
    Abstract: A silver-coated resin particle having a resin particle and a silver coating layer provided on a surface of the resin particle, in which an average value of a 10% compressive elastic modulus is in a range of 500 MPa or more and 15,000 MPa or less and a variation coefficient of the 10% compressive elastic modulus is 30% or less.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: January 3, 2023
    Assignees: Mitsubishi Materials Corporation, Mitsubishi Materials Electronic Chemicals Co., Ltd.
    Inventors: Hiroto Akaike, Kazuhiko Yamasaki, Kensuke Kageyama, Hirokazu Tsukada
  • Publication number: 20210363322
    Abstract: A silver-coated resin particle having a resin particle and a silver coating layer provided on a surface of the resin particle, in which an average value of a 10% compressive elastic modulus is in a range of 500 MPa or more and 15,000 MPa or less and a variation coefficient of the 10% compressive elastic modulus is 30% or less.
    Type: Application
    Filed: January 28, 2019
    Publication date: November 25, 2021
    Inventors: Hiroto Akaike, Kazuhiko Yamasaki, Kensuke Kageyama, Hirokazu Tsukada
  • Patent number: 10510462
    Abstract: A silver-coated resin particle including a heat-resistant resin core particle and a silver coating layer formed on the surface of the resin core particle. The average grain diameter of the resin core particle is 0.1 to 10 ?m, the amount of silver contained in the silver coating layer is 60 to 90 parts by mass, relative to 100 parts by mass of the silver-coated resin particle, and the exothermic peak temperature of the silver-coated resin particle by differential thermal analysis is 265° C. or higher.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: December 17, 2019
    Assignee: MITSUBISHI MATERIALS ELECTRONICS CHEMICALS CO., LTD.
    Inventors: Kensuke Kageyama, Hirokazu Tsukada
  • Patent number: 10332649
    Abstract: A conductive paste includes: a silver-coated resin; and an organic vehicle that includes a thermosetting resin composition, a curing agent, and a solvent, in which the thermosetting resin composition is an epoxy resin composition which is solid at room temperature and has a melt viscosity of 0.5 Pa·s or lower at 150° C., and a mass ratio of a content of the thermosetting resin composition to a content of the silver-coated resin is 10 to 40:60 to 90.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: June 25, 2019
    Assignees: MITSUBISHI MATERIALS CORPORATION, MITSUBISHI MATERIALS ELECTRONIC CHEMICALS CO., LTD.
    Inventors: Satoko Higano, Kazuhiko Yamasaki, Kensuke Kageyama, Hirokazu Tsukada
  • Publication number: 20170358384
    Abstract: A silver-coated resin particle including a heat-resistant resin core particle and a silver coating layer formed on the surface of the resin core particle. The average grain diameter of the resin core particle is 0.1 to 10 ?m, the amount of silver contained in the silver coating layer is 60 to 90 parts by mass, relative to 100 parts by mass of the silver-coated resin particle, and the exothermic peak temperature of the silver-coated resin particle by differential thermal analysis is 265° C. or higher.
    Type: Application
    Filed: January 6, 2016
    Publication date: December 14, 2017
    Applicant: MITSUBISHI MATERIALS ELECTRONIC CHEMICALS CO., LTD.
    Inventors: Kensuke KAGEYAMA, Hirokazu TSUKADA
  • Publication number: 20170103824
    Abstract: A conductive paste includes: a silver-coated resin; and an organic vehicle that includes a thermosetting resin composition, a curing agent, and a solvent, in which the thermosetting resin composition is an epoxy resin composition which is solid at room temperature and has a melt viscosity of 0.5 Pa·s or lower at 150° C., and a mass ratio of a content of the thermosetting resin composition to a content of the silver-coated resin is 10 to 40:60 to 90.
    Type: Application
    Filed: March 27, 2015
    Publication date: April 13, 2017
    Applicants: MITSUBISHI MATERIALS CORPORATION, Mitsubishi Materials Electronic Chemicals Co., Ltd., Mitsubishi Materials Electronic Chemicals Co., Ltd.
    Inventors: Satoko Higano, Kazuhiko Yamasaki, Kensuke Kageyama, Hirokazu Tsukada
  • Patent number: 9293325
    Abstract: An object of the present invention is to achieve improvement in performance of a thin film transistor including an oxide as a gate insulating layer, or simplification and energy saving in the processes of producing such a thin film transistor. A thin film transistor (100) of the present invention includes a first oxide layer (possibly containing inevitable impurities) (32) consisting of lanthanum (La) and tantalum (Ta), which has a surface (32a) formed after a precursor layer obtained from a precursor solution as a start material including a precursor containing lanthanum (La) and a precursor containing tantalum (Ta) as solutes is exposed to a hydrochloric acid vapor, between a gate electrode (20) and a channel (52). Moreover, in the thin film transistor, the surface (32a) of the first oxide layer (32) is in contact with the channel (52).
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: March 22, 2016
    Assignees: JAPAN SCIENCE AND TECHNOLOGY AGENCY, MITSUBISHI MATERIALS CORPORATION, MITSUBISHI MATERIALS ELECTRONIC CHEMICALS CO., LTD.
    Inventors: Tatsuya Shimoda, Hirokazu Tsukada, Takaaki Miyasako
  • Publication number: 20150001536
    Abstract: An object of the present invention is to achieve improvement in performance of a thin film transistor including an oxide as a gate insulating layer, or simplification and energy saving in the processes of producing such a thin film transistor. A thin film transistor (100) of the present invention includes a first oxide layer (possibly containing inevitable impurities) (32) consisting of lanthanum (La) and tantalum (Ta), which has a surface (32a) formed after a precursor layer obtained from a precursor solution as a start material including a precursor containing lanthanum (La) and a precursor containing tantalum (Ta) as solutes is exposed to a hydrochloric acid vapor, between a gate electrode (20) and a channel (52). Moreover, in the thin film transistor, the surface (32a) of the first oxide layer (32) is in contact with the channel (52).
    Type: Application
    Filed: December 20, 2012
    Publication date: January 1, 2015
    Inventors: Tatsuya Shimoda, Hirokazu Tsukada, Takaaki Miyasako
  • Patent number: 4649414
    Abstract: In a planer type PNPN semiconductor switch having a MOS FET structure, a field plate electrode is embedded in an insulator covering a surface of a semiconductor substrate to overlie an interface between the semiconductor substrate and a P gate region for limiting an extention of a depletion layer from an anode region to a P gate region.
    Type: Grant
    Filed: September 18, 1985
    Date of Patent: March 10, 1987
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Jun Ueda, Hirokazu Tsukada, Yoichi Nanba
  • Patent number: 4489340
    Abstract: A PNPN semiconductor switch including an N type semiconductor substrate, spaced apart first and second P type diffused regions formed on a surface of an N type substrate, spaced apart first and second N type diffused regions formed in the second P type diffused region, a first gate insulating layer formed on the surface of the second P type diffused region between the first and second N type diffused regions to cover portions thereof, a first gate electrode formed on the first gate insulating layer between the first and second N type diffused regions, a resistance region disposed on the first gate insulating layer, one end of the resistance region on the side opposite to the first gate electrode, a second gate insulating layer overlying the first gate electrode and the resistance region, a semiinsulating layer formed on the surface of the substrate except over the first and second P type diffused regions, an insulating layer overlying the semiinsulating layer, a P gate electrode electrically connected to the
    Type: Grant
    Filed: January 28, 1981
    Date of Patent: December 18, 1984
    Assignees: Nippon Telegraph & Telephone Public Corporation, Oki Electric Industry Co., Ltd.
    Inventors: Jun Ueda, Haruo Mori, Kazuo Hagimura, Hirokazu Tsukada, Kotaro Kato