Patents by Inventor Hirokazu Yamagata
Hirokazu Yamagata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11948026Abstract: Formed is a dither pattern that makes it possible to output an image with excellent dot dispersibility and reduced graininess regardless of controls after quantization processing. To this end, an extended pattern in which multiple divided pixels correspond to each of multiple pixels included in quantization data and one or more of the multiple divided pixels are determined as dot-arrangeable-pixels in which dots can be printed is generated. Thereafter, the thresholds of the dither pattern are set based on the extended pattern in which the dots are arranged to obtain predetermined dispersibility.Type: GrantFiled: April 26, 2022Date of Patent: April 2, 2024Assignee: CANON KABUSHIKI KAISHAInventors: Junichi Nakagawa, Hirokazu Tanaka, Tsukasa Doi, Mayuko Yamagata, Satoshi Seki
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Publication number: 20240086662Abstract: An object is to print a high quality image with resistance to print misalignment. To this end, the image processing apparatus generates quantized data for printing a first dot pattern and a second dot pattern in an overlapping manner. The first dot pattern and the second dot pattern are lattice patterns varying in a combination of two basis vectors. In a combined dot pattern obtained by combining the first and second dot patterns, there is a neighboring dot in which a dot in the first dot pattern and a dot in the second dot pattern are arranged at an interval smaller than a lattice spacing. The neighboring dot includes multiple neighboring dots varying in an approach direction.Type: ApplicationFiled: November 16, 2023Publication date: March 14, 2024Inventors: Tsukasa Doi, Hirokazu Tanaka, Satoshi Seki, Junichi Nakagawa, Mayuko Yamagata
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Patent number: 11251259Abstract: An organic light-emitting diode display may have rounded corners. A negative power supply path may be used to distribute a negative voltage to a cathode layer, while a positive power supply path may be used to distribute a positive power supply voltage to each pixel in the display. The positive power supply path may have a cutout that is occupied by the negative power supply path to decrease resistance of the negative power supply path in a rounded corner of the display. To mitigate reflections caused by the positive power supply path being formed over tightly spaced data lines, the positive power supply path may be omitted in a rounded corner of the display, a shielding layer may be formed over the positive power supply path in the rounded corner, or non-linear gate lines may be formed over the positive power supply path.Type: GrantFiled: July 27, 2020Date of Patent: February 15, 2022Assignee: Apple Inc.Inventors: Tiffany T. Moy, Yuchi Che, Seonpil Jang, Warren S. Rieutort-Louis, Bhadrinarayana Lalgudi Visweswaran, Jae Won Choi, Abbas Jamshidi Roudbari, Myung-Kwan Ryu, Hirokazu Yamagata, Keisuke Otsu
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Patent number: 11121263Abstract: Display panels with hydrogen trap layers are described. The hydrogen trap layers may be incorporated into a variety of locations to getter or block hydrogen diffusion into the semiconductor oxide layer of an oxide transistor.Type: GrantFiled: January 17, 2020Date of Patent: September 14, 2021Assignee: Apple Inc.Inventors: Jehun Lee, Ching-Sang Chuang, Hirokazu Yamagata, Jiun-Jye Chang, Kenny Kim, Po-Chun Yeh, Shih Chang Chang, Ting-Kuo Chang
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Publication number: 20210066505Abstract: Display panels with hydrogen trap layers are described. The hydrogen trap layers may be incorporated into a variety of locations to getter or block hydrogen diffusion into the semiconductor oxide layer of an oxide transistor.Type: ApplicationFiled: January 17, 2020Publication date: March 4, 2021Inventors: Jehun Lee, Ching-Sang Chuang, Hirokazu Yamagata, Jiun-Jye Chang, Kenny Kim, Po-Chun Yeh, Shih Chang Chang, Ting-Kuo Chang
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Publication number: 20200357879Abstract: An organic light-emitting diode display may have rounded corners. A negative power supply path may be used to distribute a negative voltage to a cathode layer, while a positive power supply path may be used to distribute a positive power supply voltage to each pixel in the display. The positive power supply path may have a cutout that is occupied by the negative power supply path to decrease resistance of the negative power supply path in a rounded corner of the display. To mitigate reflections caused by the positive power supply path being formed over tightly spaced data lines, the positive power supply path may be omitted in a rounded corner of the display, a shielding layer may be formed over the positive power supply path in the rounded corner, or non-linear gate lines may be formed over the positive power supply path.Type: ApplicationFiled: July 27, 2020Publication date: November 12, 2020Inventors: Tiffany T. Moy, Yuchi Che, Seonpil Jang, Warren S. Rieutort-Louis, Bhadrinarayana Lalgudi Visweswaran, Jae Won Choi, Abbas Jamshidi Roudbari, Myung-Kwan Ryu, Hirokazu Yamagata, Keisuke Otsu
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Patent number: 10763323Abstract: An organic light-emitting diode display may have rounded corners. A negative power supply path may be used to distribute a negative voltage to a cathode layer, while a positive power supply path may be used to distribute a positive power supply voltage to each pixel in the display. The positive power supply path may have a cutout that is occupied by the negative power supply path to decrease resistance of the negative power supply path in a rounded corner of the display. To mitigate reflections caused by the positive power supply path being formed over tightly spaced data lines, the positive power supply path may be omitted in a rounded corner of the display, a shielding layer may be formed over the positive power supply path in the rounded corner, or non-linear gate lines may be formed over the positive power supply path.Type: GrantFiled: April 4, 2019Date of Patent: September 1, 2020Assignee: Apple Inc.Inventors: Tiffany T. Moy, Yuchi Che, Seonpil Jang, Warren S. Rieutort-Louis, Bhadrinarayana Lalgudi Visweswaran, Jae Won Choi, Abbas Jamshidi Roudbari, Myung-Kwan Ryu, Hirokazu Yamagata, Keisuke Otsu
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Publication number: 20190393295Abstract: An organic light-emitting diode display may have rounded corners. A negative power supply path may be used to distribute a negative voltage to a cathode layer, while a positive power supply path may be used to distribute a positive power supply voltage to each pixel in the display. The positive power supply path may have a cutout that is occupied by the negative power supply path to decrease resistance of the negative power supply path in a rounded corner of the display. To mitigate reflections caused by the positive power supply path being formed over tightly spaced data lines, the positive power supply path may be omitted in a rounded corner of the display, a shielding layer may be formed over the positive power supply path in the rounded corner, or non-linear gate lines may be formed over the positive power supply path.Type: ApplicationFiled: April 4, 2019Publication date: December 26, 2019Inventors: Tiffany T. Moy, Yuchi Che, Seonpil Jang, Warren S. Rieutort-Louis, Bhadrinarayana Lalgudi Visweswaran, Jae Won Choi, Abbas Jamshidi Roudbari, Myung-Kwan Ryu, Hirokazu Yamagata, Keisuke Otsu
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Patent number: 10101853Abstract: Thin-film transistor circuitry for a display may include conductive layers such as transparent conductive layers and metal layers and may include dielectric layers. The dielectric layers may include buffer layers, interlayer dielectric, gate insulator, and organic planarization layers. The organic planarization layers may be patterned photolithographically to form vias, trenches, and other structures. Trenches may be formed by removing the planarization layer in a strip. When planarization material is removed for forming a trench or other structure, a step is formed in the planarization material. Metal lines such as data lines and other signal lines may cross steps in the planarization material. To prevent shorts between lines, a step may have protrusions that help eliminate metal etch residue. Vias may be reduced in depth by forming metal bumps and dielectric bumps under the vias and by forming other via structures.Type: GrantFiled: September 8, 2016Date of Patent: October 16, 2018Assignee: Apple Inc.Inventors: Yu Cheng Chen, Keitaro Yamashita, Abbas Jamshidi Roudbari, Hirokazu Yamagata, Ting-Kuo Chang
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Patent number: 9954196Abstract: A high-quality light emitting device is provided which has a long-lasting light emitting element free from the problems of conventional ones because of a structure that allows less degradation, and a method of manufacturing the light emitting device is provided. After a bank is formed, an exposed anode surface is wiped using a PVA (polyvinyl alcohol)-based porous substance or the like to level the surface and remove dusts from the surface. An insulating film is formed between an interlayer insulating film on a TFT and the anode. Alternatively, plasma treatment is performed on the surface of the interlayer insulating film on the TFT for surface modification.Type: GrantFiled: September 8, 2017Date of Patent: April 24, 2018Assignee: Semiconductor Energy Laboratory Co., LTD.Inventors: Hirokazu Yamagata, Shunpei Yamazaki, Toru Takayama
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Publication number: 20180047933Abstract: A high-quality light emitting device is provided which has a long-lasting light emitting element free from the problems of conventional ones because of a structure that allows less degradation, and a method of manufacturing the light emitting device is provided. After a bank is formed, an exposed anode surface is wiped using a PVA (polyvinyl alcohol)-based porous substance or the like to level the surface and remove dusts from the surface. An insulating film is formed between an interlayer insulating film on a TFT and the anode. Alternatively, plasma treatment is performed on the surface of the interlayer insulating film on the TFT for surface modification.Type: ApplicationFiled: September 8, 2017Publication date: February 15, 2018Inventors: Hirokazu YAMAGATA, Shunpei YAMAZAKI, Toru TAKAYAMA
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Publication number: 20170351379Abstract: Thin-film transistor circuitry for a display may include conductive layers such as transparent conductive layers and metal layers and may include dielectric layers. The dielectric layers may include buffer layers, interlayer dielectric, gate insulator, and organic planarization layers. The organic planarization layers may be patterned photolithographically to form vias, trenches, and other structures. Trenches may be formed by removing the planarization layer in a strip. When planarization material is removed for forming a trench or other structure, a step is formed in the planarization material. Metal lines such as data lines and other signal lines may cross steps in the planarization material. To prevent shorts between lines, a step may have protrusions that help eliminate metal etch residue. Vias may be reduced in depth by forming metal bumps and dielectric bumps under the vias and by forming other via structures.Type: ApplicationFiled: September 8, 2016Publication date: December 7, 2017Inventors: Yu Cheng Chen, Keitaro Yamashita, Abbas Jamshidi Roudbari, Hirokazu Yamagata, Ting-Kuo Chang
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Patent number: 9768405Abstract: A high-quality light emitting device is provided which has a long-lasting light emitting element free from the problems of conventional ones because of a structure that allows less degradation, and a method of manufacturing the light emitting device is provided. After a bank is formed, an exposed anode surface is wiped using a PVA (polyvinyl alcohol)-based porous substance or the like to level the surface and remove dusts from the surface. An insulating film is formed between an interlayer insulating film on a TFT and the anode. Alternatively, plasma treatment is performed on the surface of the interlayer insulating film on the TFT for surface modification.Type: GrantFiled: November 18, 2016Date of Patent: September 19, 2017Assignee: Semiconductor Energy Laboratory Co., LTD.Inventors: Hirokazu Yamagata, Shunpei Yamazaki, Toru Takayama
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Patent number: 9612492Abstract: A display may have a thin-film transistor layer and color filter layer. The display may have an active area and an inactive border area. Light blocking structures in the inactive area may prevent stray backlight from a backlight light guide plate from leaking out of the display. The thin-film transistor layer may have a clear substrate, a patterned black masking layer on the clear substrate, a clear planarization layer on the black masking layer, and a layer of thin-film transistor circuitry on the clear planarization layer. The black masking layer may be formed from black photoimageable polyimide. The clear planarization layer may be formed from spin-on glass. The light blocking structures may include a first layer formed from a portion of the black masking layer and a second layer such as a layer of black tape on the underside of the color filter layer.Type: GrantFiled: January 24, 2014Date of Patent: April 4, 2017Assignee: Apple Inc.Inventors: Byung Duk Yang, Kyung-Wook Kim, Shih-Chang Chang, Hiroshi Osawa, Hirokazu Yamagata, Daisuke Nozu
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Publication number: 20170069866Abstract: A high-quality light emitting device is provided which has a long-lasting light emitting element free from the problems of conventional ones because of a structure that allows less degradation, and a method of manufacturing the light emitting device is provided. After a bank is formed, an exposed anode surface is wiped using a PVA (polyvinyl alcohol)-based porous substance or the like to level the surface and remove dusts from the surface. An insulating film is formed between an interlayer insulating film on a TFT and the anode. Alternatively, plasma treatment is performed on the surface of the interlayer insulating film on the TFT for surface modification.Type: ApplicationFiled: November 18, 2016Publication date: March 9, 2017Inventors: Hirokazu YAMAGATA, Shunpei YAMAZAKI, Toru TAKAYAMA
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Patent number: 9530801Abstract: A display may have a color filter layer and a thin-film transistor layer. A layer of liquid crystal material may be located between the color filter layer and the thin-film transistor (TFT) layer. The TFT layer may include thin-film transistors formed on top of a glass substrate. A passivation layer may be formed on the thin-film transistor layers. A first low-k dielectric layer may be formed on the passivation layer. Data line routing structures may be formed on the first low-k dielectric layer. A second low-k dielectric layer may be formed on the first low-k dielectric layer. A common voltage electrode and associated storage capacitance may be formed on the second low-k dielectric layer. The first and second low-k dielectric layers may be formed from material having substantially similar refractive indices to maximize backlight transmittance and may have appropriate thicknesses so as to minimize parasitic capacitive loading.Type: GrantFiled: January 13, 2014Date of Patent: December 27, 2016Assignee: Apple Inc.Inventors: Daisuke Nozu, Hirokazu Yamagata, Hiroshi Osawa, Shang-Chih Lin, Shih-Chang Chang, Yu-Cheng Chen
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Patent number: 9502679Abstract: A high-quality light emitting device is provided which has a long-lasting light emitting element free from the problems of conventional ones because of a structure that allows less degradation, and a method of manufacturing the light emitting device is provided. After a bank is formed, an exposed anode surface is wiped using a PVA (polyvinyl alcohol)-based porous substance or the like to level the surface and remove dusts from the surface. An insulating film is formed between an interlayer insulating film on a TFT and the anode. Alternatively, plasma treatment is performed on the surface of the interlayer insulating film on the TFT for surface modification.Type: GrantFiled: October 10, 2014Date of Patent: November 22, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hirokazu Yamagata, Shunpei Yamazaki, Toru Takayama
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Patent number: 9412948Abstract: A method of manufacturing a light emitting device is provided in which satisfactory image display can be performed by the investigation and repair of short circuits in defect portions of light emitting elements. A backward direction electric current flows in the defect portions if a reverse bias voltage is applied to the light emitting elements having the defect portions. Emission of light which occurred from the backward direction electric current flow is measured by using an emission microscope, specifying the position of the defect portions, and short circuit locations can be repaired by irradiating a laser to the defect portions, turning them into insulators.Type: GrantFiled: February 19, 2015Date of Patent: August 9, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hirokazu Yamagata, Yoshimi Adachi, Noriko Shibata
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Publication number: 20150200207Abstract: A display may have a color filter layer and a thin-film transistor layer. A layer of liquid crystal material may be located between the color filter layer and the thin-film transistor (TFT) layer. The TFT layer may include thin-film transistors formed on top of a glass substrate. A passivation layer may be formed on the thin-film transistor layers. A first low-k dielectric layer may be formed on the passivation layer. Data line routing structures may be formed on the first low-k dielectric layer. A second low-k dielectric layer may be formed on the first low-k dielectric layer. A common voltage electrode and associated storage capacitance may be formed on the second low-k dielectric layer. The first and second low-k dielectric, layers may be formed from material having substantially similar refractive indices to maximize backlight transmittance and may have appropriate thicknesses so as to minimize parasitic capacitive loading.Type: ApplicationFiled: January 13, 2014Publication date: July 16, 2015Applicant: Apple Inc.Inventors: Daisuke Nozu, Hirokazu Yamagata, Hiroshi Osawa, Shang-Chih Lin, Shih-Chang Chang, Yu-Cheng Chen
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Publication number: 20150171330Abstract: A method of manufacturing a light emitting device is provided in which satisfactory image display can be performed by the investigation and repair of short circuits in defect portions of light emitting elements. A backward direction electric current flows in the defect portions if a reverse bias voltage is applied to the light emitting elements having the defect portions. Emission of light which occurred from the backward direction electric current flow is measured by using an emission microscope, specifying the position of the defect portions, and short circuit locations can be repaired by irradiating a laser to the defect portions, turning them into insulators.Type: ApplicationFiled: February 19, 2015Publication date: June 18, 2015Inventors: Hirokazu YAMAGATA, Yoshimi ADACHI, Noriko SHIBATA