Patents by Inventor Hiroki Fujimura

Hiroki Fujimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11968545
    Abstract: A user equipment includes a receiving unit that receives a reference signal from a secondary cell; a transmitting unit that transmits a result of a measurement of the reference signal; and a control unit that selects, when the secondary cell is deactivated after the transmitting unit transmits the result of the measurement and the secondary cell is reactivated, and when a time interval from a timing at which the transmitting unit transmits the result of the measurement until a timing at which the secondary cell is reactivated is within a predetermined time interval, a receiving beam that is applied to the secondary cell upon transmitting the result of the measurement by the transmitting unit, as a receiving beam to be applied to the reactivated secondary cell.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: April 23, 2024
    Assignee: NTT DOCOMO, INC.
    Inventors: Takuma Takada, Hiroki Harada, Naoki Fujimura
  • Publication number: 20240104065
    Abstract: Pieces of information on multiple file management systems are managed by one contract in a distributed ledger. An administrator terminal includes: a file management system generation unit that issues a contract generation transaction for generating, in blockchain data, a contract in which a network identifier that identifies a file management system is associated with an identifier of a participant terminal in a blockchain system, and notifying the participant terminal of the network identifier and an identifier of the contract; and a file management control unit that issues a registration transaction for registering, in the contract, connection information of the administrator terminal in the file management system, acquires connection information of the participant terminal in the file management system from the contract, and establishes a P2P connection with the participant terminal based on the acquired connection information.
    Type: Application
    Filed: October 23, 2023
    Publication date: March 28, 2024
    Inventors: Shigenori OHASHI, Hiroki WATANABE, Tatsuro ISHIDA, Shigeru FUJIMURA, Atsushi NAKADAIRA
  • Patent number: 11930553
    Abstract: A terminal is disclosed including a receiver that receives an instruction for a quality measurement of a cell in Dual Connectivity (DC), the cell being in an unconnected state; and a processor that performs the quality measurement in accordance with the instruction, wherein the processor performs the quality measurement in a measurement period based on a discontinuous reception configuration in a Secondary Cell Group (SCG). In other aspects, a measurement method for a terminal is also disclosed.
    Type: Grant
    Filed: August 9, 2018
    Date of Patent: March 12, 2024
    Assignee: NTT DOCOMO, INC.
    Inventors: Takuma Takada, Hiroki Harada, Naoki Fujimura
  • Publication number: 20240079902
    Abstract: An electricity charge output method includes, by a computer: acquiring a sum of electric energy usages, in a specified period, of a previously specified first device group among all devices provided at a facility and of a second device group that is among the all devices and is different from the first device group; acquiring an electric energy usage of the first device group in the specified period; reducing the sum in accordance with the electric energy usage of the first device group and calculating an electricity charge for the facility in the specified period, based on an electric energy after the reduction; and outputting information representing the electricity charge for the facility.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Applicant: Panasonic Intellectual Property Corporation of America
    Inventors: Ryota FUJIMURA, Ryuta HAMAMOTO, Hiroki TAKEUCHI
  • Patent number: 10517177
    Abstract: An on-vehicle electronic circuit mounting board includes: a surface mount type package component including a plurality of electrode pads disposed along an outer periphery of a component bottom surface; and a printed wiring board having a plurality of lands disposed along the plurality of electrode pads on a top surface of the printed wiring board opposed to the component bottom surface, and in which each land is disposed to be opposed to the corresponding electrode pad and electrically connected to the electrode pad by soldered connection. An outer soldering slope and an inner soldering slope are formed between a land of the plurality of lands and an electrode pad corresponding to the land, and the land is shifted with respect to the corresponding electrode pad such that one of the outer soldering slope and the inner soldering slope faces the wiring board side and the other faces the component side.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: December 24, 2019
    Assignee: Tokyo Electron Limited
    Inventors: Hiroki Fujimura, Takashi Terayama, Hiroki Ishibashi
  • Publication number: 20190029115
    Abstract: An on-vehicle electronic circuit mounting board includes: a surface mount type package component including a plurality of electrode pads disposed along an outer periphery of a component bottom surface; and a printed wiring board having a plurality of lands disposed along the plurality of electrode pads on a top surface of the printed wiring board opposed to the component bottom surface, and in which each land is disposed to be opposed to the corresponding electrode pad and electrically connected to the electrode pad by soldered connection. An outer soldering slope and an inner soldering slope are formed between a land of the plurality of lands and an electrode pad corresponding to the land, and the land is shifted with respect to the corresponding electrode pad such that one of the outer soldering slope and the inner soldering slope faces the wiring board side and the other faces the component side.
    Type: Application
    Filed: July 9, 2018
    Publication date: January 24, 2019
    Inventors: Hiroki Fujimura, Takashi Terayama, Hiroki Ishibashi
  • Patent number: 8998463
    Abstract: A light-emitting apparatus is provided with: a light-emitting module; a control circuit unit configured to control the lighting of the light-emitting module; a heat-radiating substrate configured to support the light-emitting module and the control circuit unit in such a manner as to recover the heat produced by the light-emitting module and the control circuit unit; and a connection support unit mounted on the heat-radiating substrate in such a state as to support an electrically conductive member by which to electrically connect the light-emitting module and the control circuit unit.
    Type: Grant
    Filed: August 25, 2010
    Date of Patent: April 7, 2015
    Assignee: Koito Manufacturing Co., Ltd.
    Inventors: Akihiro Matsumoto, Tetsuya Suzuki, Tomoyuki Nakagawa, Akitaka Kanamori, Takayuki Saito, Kaname Miyagishima, Hiroki Fujimura
  • Publication number: 20120155101
    Abstract: A light-emitting apparatus is provided with: a light-emitting module; a control circuit unit configured to control the lighting of the light-emitting module; a heat-radiating substrate configured to support the light-emitting module and the control circuit unit in such a manner as to recover the heat produced by the light-emitting module and the control circuit unit; and a connection support unit mounted on the heat-radiating substrate in such a state as to support an electrically conductive member by which to electrically connect the light-emitting module and the control circuit unit.
    Type: Application
    Filed: August 25, 2010
    Publication date: June 21, 2012
    Applicant: KOITO MANUFACTURING CO.,LTD.
    Inventors: Akihiro Matsumoto, Tetsuya Suzuki, Tomoyuki Nakagawa, Akitaka Kanamori, Takayuki Saito, Kaname Miyagishima, Hiroki Fujimura
  • Patent number: 8082607
    Abstract: A sanitary cleansing apparatus includes: a main body incorporating a water discharge nozzle that squirts water from a water discharge port; a toilet seat rotatably and pivotally supported at a relatively anterior position of the main body; a toilet lid rotatably and pivotally supported at a relatively posterior position of the main body and generally entirely covering an upper face of the toilet seat and the main body in a closed state; a transmissive window provided at a rear of the toilet lid and formed from a material different from that of the toilet lid; and a human body detection sensor provided in the upper face of the main body and being capable of detecting a human body through the transmissive window in the closed state of the toilet lid.
    Type: Grant
    Filed: February 13, 2007
    Date of Patent: December 27, 2011
    Assignee: Toto Ltd
    Inventors: Hiroyuki Matsushita, Hiroki Fujimura, Saki Nakao, Tatsuya Fukuda
  • Publication number: 20090217447
    Abstract: A sanitary cleansing apparatus includes: a main body incorporating a water discharge nozzle that squirts water from a water discharge port; a toilet seat rotatably and pivotally supported at a relatively anterior position of the main body; a toilet lid rotatably and pivotally supported at a relatively posterior position of the main body and generally entirely covering an upper face of the toilet seat and the main body in a closed state; a transmissive window provided at a rear of the toilet lid and formed from a material different from that of the toilet lid; and a human body detection sensor provided in the upper face of the main body and being capable of detecting a human body through the transmissive window in the closed state of the toilet lid.
    Type: Application
    Filed: February 13, 2007
    Publication date: September 3, 2009
    Applicant: TOTO LTD
    Inventors: Hiroyuki Matsushita, Hiroki Fujimura, Saki Nakao, Tatsuya Fukuda
  • Patent number: 5909588
    Abstract: An instruction code is received by an instruction input section 103 and then decoded by the instruction decode section 105 to generate an operand and control signals. The instruction division control section 109 generates a division control signal based on the control signals and an operand selection section 107 generates an operand having a desired bit width by using the operand from the instruction decode section 105 based on the division control signal. An arithmetic section 111 divides the operand into a desired bit width parts based on the division control signal and performs arithmetic operation. A memory access control section 115 receives calculated address and transfers this calculated address and the division control signal to a memory. The memory access control section 115 receives data from the memory and transfers the data into the arithmetic result store section 113.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: June 1, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroki Fujimura, Hiroyuki Takai, Toshiyuki Yaguchi, Seiji Koino, Mikio Takasugi, Atsushi Kunimatsu
  • Patent number: 5844828
    Abstract: A shift circuit consists of a sequence of a first stage shifter for receiving 32-bit input data, a second stage shifter, and a third stage shifter. The first stage shifter shifts the input data in a higher or lower direction by any one of 0 to 7 bits and provides the second stage shifter with a shifted 32-bit result. Each of the second and third stage shifters receives a shifted 32-bit result from the preceding stage shifter and shifts each byte of the shifted result independently in the higher or lower direction by 8 or 16 bits. The second and third stage shifters consist each of selectors that receive control signals, respectively, to realize various shifting operations on the input data, thereby providing a variety of data operations.
    Type: Grant
    Filed: August 6, 1997
    Date of Patent: December 1, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroki Fujimura, Takashi Miyamora