Patents by Inventor Hiroki Hidaka

Hiroki Hidaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11965556
    Abstract: A method for measuring indentation resistance includes: obtaining a first curve indicating a yield shear stress in a depth direction of a raceway surface of a material forming a rolling bearing in a state before the raceway surface is subjected to machining, a second curve indicating a static shear stress in the depth direction of the raceway surface in a state in which the raceway surface is subjected to the machining, and a third curve indicating a static shear stress in the depth direction of the raceway surface in a state in which rolling elements are in contact with the raceway surface and a static load is applied to the raceway surface; and obtaining a correlation between an area and an indentation depth of the raceway ring by defining a region surrounded by exceeding the first curve and the second curve and falling below the third curve as the area.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: April 23, 2024
    Assignee: NSK LTD.
    Inventors: Hirofumi Ito, Takahito Shimada, Masahide Natori, Hideyuki Hidaka, Hayato Ishigami, Hiroki Komata
  • Publication number: 20230387319
    Abstract: A semiconductor device including a first oxide semiconductor layer, a first gate electrode opposing the first oxide semiconductor layer, a first gate insulating layer between the first oxide semiconductor layer and the first gate electrode, a first insulating layer covering the first oxide semiconductor layer and having a first opening, a first conductive layer above the first insulating layer and in the first opening, the first conductive layer being electrically connected to the first oxide semiconductor layer, and an oxide layer between an upper surface of the first insulating layer and the first conductive layer, wherein the first insulating layer is exposed from the oxide layer in a region not overlapping the first conductive layer in a plan view.
    Type: Application
    Filed: August 10, 2023
    Publication date: November 30, 2023
    Inventors: Yohei YAMAGUCHI, Yuichiro HANYU, Hiroki HIDAKA
  • Publication number: 20230353138
    Abstract: A technique disclosed in the specification of the present application is a technique for increasing a degree of freedom of an IGBT in a device, and as a result, achieving downsizing of the device. A semiconductor device relating to a technique disclosed in the specification of the present application includes a plurality of IGBTs connected in series on a power source line in which bus current flows and a MOSFET connected to the plurality of IGBTs in series. The bus current flows via a drain terminal and a source terminal of the MOSFET.
    Type: Application
    Filed: February 9, 2023
    Publication date: November 2, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Taketo NISHIYAMA, Hiroki HIDAKA
  • Patent number: 11764305
    Abstract: A semiconductor device including a first oxide semiconductor layer, a first gate electrode opposing the first oxide semiconductor layer, a first gate insulating layer between the first oxide semiconductor layer and the first gate electrode, a first insulating layer covering the first oxide semiconductor layer and having a first opening, a first conductive layer above the first insulating layer and in the first opening, the first conductive layer being electrically connected to the first oxide semiconductor layer, and an oxide layer between an upper surface of the first insulating layer and the first conductive layer, wherein the first insulating layer is exposed from the oxide layer in a region not overlapping the first conductive layer in a plan view.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: September 19, 2023
    Assignee: Japan Display Inc.
    Inventors: Yohei Yamaguchi, Yuichiro Hanyu, Hiroki Hidaka
  • Patent number: 11680979
    Abstract: An object is to provide a semiconductor device capable of accurately detecting a temperature of a transistor part and a temperature of the diode part, and improving an overheat protection function. A semiconductor device includes a semiconductor chip having a cell region made up of a plurality of cells including cells corresponding to a transistor part and a diode part, respectively, a temperature detection part detecting a temperature of the transistor part, and a temperature detection part detecting a temperature of the diode part, the temperature detection part is disposed in the cell corresponding to the transistor part, and the temperature detection part is disposed in the cell corresponding to the diode part.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: June 20, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroki Hidaka, Keisuke Eguchi, Nobuchika Aoki, Rei Yoneyama
  • Patent number: 11581307
    Abstract: The object is to provide a semiconductor device that prevents a snapback operation and has excellent heat dissipation. The semiconductor device includes a semiconductor substrate, transistor portions, diode portions, a surface electrode, and external wiring. The transistor portions and the diode portions are provided in the semiconductor substrate and are arranged in one direction parallel with the surface of the semiconductor substrate. A bonding portion of the external wiring is connected to the surface electrode. The transistor portions and the diode portions are provided in a first region and a second region and alternately arranged in the one direction. A first transistor width and a first diode width in the first region are smaller than a width of the bonding portion. A second transistor width and a second diode width in the second region are larger than the width of the bonding portion.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: February 14, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Keisuke Eguchi, Rei Yoneyama, Nobuchika Aoki, Hiroki Hidaka
  • Publication number: 20220065918
    Abstract: An object is to provide a semiconductor device capable of accurately detecting a temperature of a transistor part and a temperature of the diode part, and improving an overheat protection function. A semiconductor device includes a semiconductor chip having a cell region made up of a plurality of cells including cells corresponding to a transistor part and a diode part, respectively, a temperature detection part detecting a temperature of the transistor part, and a temperature detection part detecting a temperature of the diode part, the temperature detection part is disposed in the cell corresponding to the transistor part, and the temperature detection part is disposed in the cell corresponding to the diode part.
    Type: Application
    Filed: April 28, 2021
    Publication date: March 3, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroki HIDAKA, Keisuke EGUCHI, Nobuchika AOKI, Rei YONEYAMA
  • Publication number: 20220045216
    Abstract: A semiconductor device including a first oxide semiconductor layer, a first gate electrode opposing the first oxide semiconductor layer, a first gate insulating layer between the first oxide semiconductor layer and the first gate electrode, a first insulating layer covering the first oxide semiconductor layer and having a first opening, a first conductive layer above the first insulating layer and in the first opening, the first conductive layer being electrically connected to the first oxide semiconductor layer, and an oxide layer between an upper surface of the first insulating layer and the first conductive layer, wherein the first insulating layer is exposed from the oxide layer in a region not overlapping the first conductive layer in a plan view.
    Type: Application
    Filed: October 26, 2021
    Publication date: February 10, 2022
    Inventors: Yohei YAMAGUCHI, Yuichiro HANYU, Hiroki HIDAKA
  • Patent number: 11189734
    Abstract: A semiconductor device including a first oxide semiconductor layer, a first gate electrode opposing the first oxide semiconductor layer, a first gate insulating layer between the first oxide semiconductor layer and the first gate electrode, a first insulating layer covering the first oxide semiconductor layer and having a first opening, a first conductive layer above the first insulating layer and in the first opening, the first conductive layer being electrically connected to the first oxide semiconductor layer, and an oxide layer between an upper surface of the first insulating layer and the first conductive layer, wherein the first insulating layer is exposed from the oxide layer in a region not overlapping the first conductive layer in a plan view.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: November 30, 2021
    Assignee: Japan Display Inc.
    Inventors: Yohei Yamaguchi, Yuichiro Hanyu, Hiroki Hidaka
  • Publication number: 20210365219
    Abstract: A management apparatus obtains a print job. When setting for performing printing as being divided into test printing and main printing has been made for the print job, the management apparatus shows on a display, an image showing a condition of execution of a test print job and an image showing a condition of execution of the main print job.
    Type: Application
    Filed: April 19, 2021
    Publication date: November 25, 2021
    Applicant: KONICA MINOLTA, INC.
    Inventor: Hiroki HIDAKA
  • Patent number: 11183834
    Abstract: A semiconductor module includes a diode bridge circuit, a sensor configured to measure a current value of the diode bridge circuit, a current limiting circuit having an IGBT connected to the diode bridge circuit, and a protection circuit configured to switch ON and OFF the IGBT in accordance with the current value of the diode bridge circuit measured by the sensor.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: November 23, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Nobuchika Aoki, Rei Yoneyama, Keisuke Eguchi, Hiroki Hidaka
  • Publication number: 20200343240
    Abstract: The object is to provide a semiconductor device that prevents a snapback operation and has excellent heat dissipation. The semiconductor device includes a semiconductor substrate, transistor portions, diode portions, a surface electrode, and external wiring. The transistor portions and the diode portions are provided in the semiconductor substrate and are arranged in one direction parallel with the surface of the semiconductor substrate. A bonding portion of the external wiring is connected to the surface electrode. The transistor portions and the diode portions are provided in a first region and a second region and alternately arranged in the one direction. A first transistor width and a first diode width in the first region are smaller than a width of the bonding portion. A second transistor width and a second diode width in the second region are larger than the width of the bonding portion.
    Type: Application
    Filed: February 14, 2020
    Publication date: October 29, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Keisuke EGUCHI, Rei YONEYAMA, Nobuchika AOKI, Hiroki HIDAKA
  • Publication number: 20200227563
    Abstract: A semiconductor device including a first oxide semiconductor layer, a first gate electrode opposing the first oxide semiconductor layer, a first gate insulating layer between the first oxide semiconductor layer and the first gate electrode, a first insulating layer covering the first oxide semiconductor layer and having a first opening, a first conductive layer above the first insulating layer and in the first opening, the first conductive layer being electrically connected to the first oxide semiconductor layer, and an oxide layer between an upper surface of the first insulating layer and the first conductive layer, wherein the first insulating layer is exposed from the oxide layer in a region not overlapping the first conductive layer in a plan view.
    Type: Application
    Filed: January 7, 2020
    Publication date: July 16, 2020
    Inventors: Yohei YAMAGUCHI, Yuichiro HANYU, Hiroki HIDAKA
  • Publication number: 20200083700
    Abstract: A semiconductor module includes a diode bridge circuit, a sensor configured to measure a current value of the diode bridge circuit, a current limiting circuit having an IGBT connected to the diode bridge circuit, and a protection circuit configured to switch ON and OFF the IGBT in accordance with the current value of the diode bridge circuit measured by the sensor.
    Type: Application
    Filed: June 21, 2019
    Publication date: March 12, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Nobuchika AOKI, Rei YONEYAMA, Keisuke EGUCHI, Hiroki HIDAKA
  • Patent number: 10567604
    Abstract: An image forming apparatus includes a hardware processor. The hardware processor: receives page setting information in print data of a next page; stores the page setting information in a second memory at the time of receiving the print data of the next page from the external apparatus when a first memory has no area to store image information of the next page; and controls a conveyer to feed out the sheets from a paper feed tray specified by the page setting information to a conveyance path of the conveyer and to convey the sheets when the page setting information is in the second memory at the timing of feeding out the next sheet to the conveyance path of the conveyer regardless of whether the image information corresponding to the page setting information is in the first memory.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: February 18, 2020
    Assignee: Konica Minolta, Inc.
    Inventor: Hiroki Hidaka
  • Patent number: 10379482
    Abstract: An image forming method for an image forming system that includes an image former that performs both side printing for one sheet and a sheet feeding apparatus and a tray (sheet feeder) that stores a sheet to be fed to the image former, includes detecting a state change of the sheet feeder; and executing adjustment for a formation position of an image to be subjected to both side printing in a case where a state change of the sheet feeder has been detected.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: August 13, 2019
    Assignee: KONICA MINOLTA, INC.
    Inventor: Hiroki Hidaka
  • Publication number: 20190245994
    Abstract: An image forming apparatus includes a hardware processor. The hardware processor: receives page setting information in print data of a next page; stores the page setting information in a second memory at the time of receiving the print data of the next page from the external apparatus when a first memory has no area to store image information of the next page; and controls a conveyer to feed out the sheets from a paper feed tray specified by the page setting information to a conveyance path of the conveyer and to convey the sheets when the page setting information is in the second memory at the timing of feeding out the next sheet to the conveyance path of the conveyer regardless of whether the image information corresponding to the page setting information is in the first memory.
    Type: Application
    Filed: January 25, 2019
    Publication date: August 8, 2019
    Applicant: Konica Minolta, Inc.
    Inventor: Hiroki Hidaka
  • Publication number: 20180341213
    Abstract: An image forming method for an image forming system that includes an image former that performs both side printing for one sheet and a sheet feeding apparatus and a tray (sheet feeder) that stores a sheet to be fed to the image former, includes detecting a state change of the sheet feeder; and executing adjustment for a formation position of an image to be subjected to both side printing in a case where a state change of the sheet feeder has been detected.
    Type: Application
    Filed: April 17, 2018
    Publication date: November 29, 2018
    Applicant: KONICA MINOLTA, INC.
    Inventor: Hiroki HIDAKA
  • Publication number: 20180292985
    Abstract: A processing apparatus includes a unit that is movable along one direction, a touch panel that displays an operation screen of the unit, a control unit that controls movement of the unit according to operation to the touch panel, and a movement axis that moves the unit forward and reversely along the one direction. A movement button that accepts a movement instruction to the unit is displayed on the touch panel. The control unit decides the movement direction of the movement axis based on a movement direction in which a finger that has pressed the movement button moves on a screen recognizes the movement speed of the finger that moves on the screen, and decides axis movement speed from the movement speed of the finger recognized by the finger movement speed recognizing section.
    Type: Application
    Filed: April 4, 2018
    Publication date: October 11, 2018
    Inventors: Hiroki Hidaka, Kanae Hirata, Katsuharu Negishi, Hiroki Furusawa