Patents by Inventor Hiroki Kanai

Hiroki Kanai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070186141
    Abstract: Reliability of data that is stored in a disk drive by a storage system is enhanced. An information apparatus has a processor, a memory, an interface control unit, and a system control unit, which controls communications between the processor, the memory, and the interface control unit. The system control unit judges whether to attach, to data that is transferred between the memory and the system control unit, an error detecting code for protecting the data based on an address in the memory at which the data to be transferred is read or written.
    Type: Application
    Filed: March 23, 2006
    Publication date: August 9, 2007
    Inventors: Akiyoshi Hashimoto, Hiroki Kanai
  • Patent number: 7243223
    Abstract: When there is an access passing between unit disk controllers, the band of a mutual connecting network must be very large in order to exhibit the performance sufficiently, so that the cost is increased. In the present invention, the access number of a logical volume is monitored, the change of an access path is suggested to an upper class device, and the logical volume is moved or copied to each unit disk controller, so that the mutual connecting network is used mainly for copy of the logical volume, thereby reducing the necessary band.
    Type: Grant
    Filed: August 17, 2006
    Date of Patent: July 10, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Akira Fujibayashi, Kazuhisa Fujimoto, Hiroki Kanai
  • Patent number: 7240139
    Abstract: A disk array control device which includes a plurality of channel interface (IF) units, a plurality of disk IF units, a cache memory unit, and a shared memory unit. The connection system between the plurality of channel IF units and plurality of disk IF units and the cache memory unit is different from the connection system between the plurality of channel IF units and plurality of disk IF units and the shared memory unit. In the invention the plurality of channel IF units and the plurality of disk IF units are connected via a selector to the cache memory unit whereas the plurality of channel IF units and the plurality of disk IF units are directly connected to the shared memory unit with no selectors.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: July 3, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Atsushi Tanaka, Akira Fujibayashi, Hiroki Kanai, Nobuyuki Minowa
  • Patent number: 7231490
    Abstract: A storage device control apparatus includes a mounting part and an internal connection part. The mounting part can removably mount channel control unit, each with a host interface controller formed therein for receiving data I/O requests, disk control units, each with a disk interface controller formed therein for performing I/O control of the data to storage volumes storing data in response to the data I/O requests, cache memory units, each with a memory formed therein for storing the data, and storage control units, each with the host interface controller, the disk interface controller, and the memory formed therein. The internal connection part connects the channel control units, the disk control units, the cache memory units, and the storage control units in a communicable manner.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: June 12, 2007
    Assignee: Hitachi, Ltd.
    Inventor: Hiroki Kanai
  • Patent number: 7228382
    Abstract: In a storage system having a first storage control apparatus and a second storage control apparatus, the first storage control apparatus has: a first memory; a second memory; an input/output control unit for data transfer information in the second memory; and a data transfer control unit having a data buffer and a data transfer register for controlling data transfer between the first memory and second storage control apparatus based on the data transfer information read from the second memory and written in the data transfer register. When a second data transfer is controlled while a first data transfer is controlled, the data transfer control unit writes the first data transfer information and data stored in the data buffer into the second memory, reads the second data transfer information from the second memory and writes the second data transfer information into the data transfer register to control the second data transfer.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: June 5, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Hiroki Kanai, Shoji Kato, Yuusuke Yauchi
  • Patent number: 7206901
    Abstract: The enclosure 10 in which the storage control system 600 is constructed comprises a scale-out NAS head group 111 constituted by two or more NAS heads, and a scale-up NAS head 110H that is a higher performance NAS head than each of NAS head members 110L that are the NAS heads constituting the scale-out NAS group 111. The enclosure 10 permits insertion into general-purpose slots 104 in which the NAS head members 110L and another type of channel control unit 112 that differs from the NAS head members 110L are inserted. The scale-up NAS head 110H is mounted within the enclosure 10 in a different location from the general-purpose slots 104.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: April 17, 2007
    Assignee: Hitachi, Ltd.
    Inventor: Hiroki Kanai
  • Publication number: 20070079066
    Abstract: A storage device control apparatus includes a mounting part and an internal connection part. The mounting part can removably mount channel control unit, each with a host interface controller formed therein for receiving data I/O requests, disk control units, each with a disk interface controller formed therein for performing I/O control of the data to storage volumes storing data in response to the data I/O requests, cache memory units, each with a memory formed therein for storing the data, and storage control units, each with the host interface controller, the disk interface controller, and the memory formed therein. The internal connection part connects the channel control units, the disk control units, the cache memory units, and the storage control units in a communicable manner.
    Type: Application
    Filed: December 1, 2006
    Publication date: April 5, 2007
    Inventor: Hiroki Kanai
  • Publication number: 20070033343
    Abstract: A first storage control system comprises a CHN connected to a LAN CN. The CHN comprises a NAS processor and I/O processor. The I/O processor judges whether all or a portion of block level data is to be stored in either a first storage control system or a second storage control system, on the basis of an I/O allocation control data which indicates which of either the first storage control system or the second storage control system the block level data is to be stored in. On the basis of the result of this judgment, the I/O processor transfers the block level data from the NAS processor, to at least one of the DKA and the CHF connected to the second storage control system.
    Type: Application
    Filed: October 18, 2006
    Publication date: February 8, 2007
    Inventors: Junichi Iida, Hiroki Kanai, Keishi Tamura
  • Publication number: 20070033342
    Abstract: A disk array device is equipped with a plurality of input/output channels that receive data input/output requests from an external device, a plurality of cache memories provided for the corresponding respective input/output channels, each of the cache memories connected to each of the corresponding respective input/output channels, a disk drive device, a disk control module that performs data input/output to and from the disk drive device, and a communication module that communicatively connects the input/output channels with the disk control module. The disk array device also includes a consistency maintaining module that can perform a consistency maintaining processing to maintain consistency of data stored in each of the cache memories. According to the content of the data input/output request received from the external device, an execution order of a response processing to respond to the external device according to the data input/output request and the consistency maintaining processing is controlled.
    Type: Application
    Filed: October 11, 2006
    Publication date: February 8, 2007
    Inventors: Seiji Kaneko, Hiroki Kanai
  • Publication number: 20070011371
    Abstract: The network channel adapter (CHN) 8 that processes file access requests is divided into a CHN-NAS portion 3 that performs processing to convert a file access request to a block access request and a CHN-IO portion 5 that outputs the block access request. Part 3 where the CHN-NAS portion 3 is installed and part 4 where the CHN-IO portion 5 is installed are in separate locations.
    Type: Application
    Filed: September 7, 2005
    Publication date: January 11, 2007
    Inventors: Junichi Iida, Hiroki Kanai
  • Patent number: 7155527
    Abstract: The present invention enables a disk controller to make consolidated management of a great number of drives connected to a network provided within a disk subsystem and makes it possible to allocate drives to an external apparatus that needs to use some drives and connects to a network so that the external apparatus can use the drives allocated to it. The disk subsystem includes the disk controller and drives connected via a device area network and allocates one or more drives in the subsystem to an external apparatus that needs to use some drives (such as a disk controller of another disk subsystem or NAS). The external apparatus that needs to use some drives can directly connect to the above network within the subsystem. The disk controller is provided with a device allocation table and manages the allocation of the drives to external apparatuses that can use the drives. The disk controller also manages the configuration of the devices connected to the above network.
    Type: Grant
    Filed: September 16, 2002
    Date of Patent: December 26, 2006
    Assignee: Hitachi, Ltd.
    Inventor: Hiroki Kanai
  • Patent number: 7149886
    Abstract: When there is an access passing between unit disk controllers, the band of a mutual connecting network must be very large in order to exhibit the performance sufficiently, so that the cost is increased. In the present invention, the access number of a logical volume is monitored, the change of an access path is suggested to an upper class device, and the logical volume is moved or copied to each unit disk controller, so that the mutual connecting network is used mainly for copy of the logical volume, thereby reducing the necessary band.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: December 12, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Akira Fujibayashi, Kazuhisa Fujimoto, Hiroki Kanai
  • Publication number: 20060277403
    Abstract: When there is an access passing between unit disk controllers, the band of a mutual connecting network must be very large in order to exhibit the performance sufficiently, so that the cost is increased. In the present invention, the access number of a logical volume is monitored, the change of an access path is suggested to an upper class device, and the logical volume is moved or copied to each unit disk controller, so that the mutual connecting network is used mainly for copy of the logical volume, thereby reducing the necessary band.
    Type: Application
    Filed: August 17, 2006
    Publication date: December 7, 2006
    Inventors: Akira Fujibayashi, Kazuhisa Fujimoto, Hiroki Kanai
  • Patent number: 7143228
    Abstract: A first storage control system comprises a CHN connected to a LAN CN. The CHN comprises a NAS processor and I/O processor. The I/O processor judges whether all or a portion of block level data is to be stored in either a first storage control system or a second storage control system, on the basis of an I/O allocation control data which indicates which of either the first storage control system or the second storage control system the block level data is to be stored in. On the basis of the result of this judgment, the I/O processor transfers the block level data from the NAS processor, to at least one of the DKA and the CHF connected to the second storage control system.
    Type: Grant
    Filed: May 11, 2004
    Date of Patent: November 28, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Junichi Iida, Hiroki Kanai, Keishi Tamura
  • Patent number: 7139880
    Abstract: A disk array device is equipped with a plurality of input/output channels that receive data input/output requests from an external device, a plurality of cache memories provided for the corresponding respective input/output channels, each of the cache memories connected to each of the corresponding respective input/output channels, a disk drive device, a disk control module that performs data input/output to and from the disk drive device, and a communication module that communicatively connects the input/output channels with the disk control module. The disk array device also includes a consistency maintaining module that can perform a consistency maintaining processing to maintain consistency of data stored in each of the cache memories. According to the content of the data input/output request received from the external device, an execution order of a response processing to respond to the external device according to the data input/output request and the consistency maintaining processing is controlled.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: November 21, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Seiji Kaneko, Hiroki Kanai
  • Patent number: 7133976
    Abstract: A disk array device is equipped with a plurality of input/output channels that receive data input/output requests from an external device, a plurality of cache memories provided for the corresponding respective input/output channels, each of the cache memories connected to each of the corresponding respective input/output channels, a disk drive device, a disk control module that performs data input/output to and from the disk drive device, and a communication module that communicatively connects the input/output channels with the disk control module. The disk array device also includes a consistency maintaining module that can perform a consistency maintaining processing to maintain consistency of data stored in each of the cache memories. According to the content of the data input/output request received from the external device, an execution order of a response processing to respond to the external device according to the data input/output request and the consistency maintaining processing is controlled.
    Type: Grant
    Filed: January 13, 2006
    Date of Patent: November 7, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Seiji Kaneko, Hiroki Kanai
  • Patent number: 7130961
    Abstract: To execute cache data identity control between disk controllers in plural disk controllers provided with each cache. To prevent a trouble from being propagated to another disk controller even if the trouble occurs in a specific disk controller. The identity control of data is executed via a communication means between disk controllers. In case update access from a host is received, data in a cache memory of a disk controller that controls at least a data storage drive is updated. It is desirable that a cache area is divided into an area for a drive controlled by the disk controller and an area for a drive controlled by another disk controller and is used.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: October 31, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Hiroki Kanai, Kazuhisa Fujimoto, Akira Fujibayashi
  • Publication number: 20060184760
    Abstract: Provided is a storage controller capable of changing a system configuration with scalability. A storage controller blade of the storage controller includes: interface units that each connect to one of a host computer and a disk device; a processor unit that controls a configuration of the storage controller and data access; a memory unit that stores a data cache and configuration information on the interface unit and the processor unit; and a matural connection unit that connects the interface units, the processor unit, and the memory unit to one another. The processor unit recognizes a form of connection to another storage controller blade over the matural network, and the connection path to another storage controller blade is set in the matural connection unit based on the recognized form of connection.
    Type: Application
    Filed: April 15, 2005
    Publication date: August 17, 2006
    Inventors: Akira Fujibayashi, Hiroki Kanai
  • Patent number: 7058761
    Abstract: A clustering disk subsystem comprising a switch holding a table which can modify a destination of a request from a host computer, wherein the switch transfers an access request to another channel according to a destination channel status such as heavy load or fault, and the channel which received the request processes the request by proxy for load balancing between internal disk controllers in a clustering disk subsystem. The subsystem has an effect in which load balancing or fail-over between channels or disk controllers can be performed without any special hardware or software in the host. As a result, good performance can be obtained even when access requests from the host computer are concentrated in a specific channel or disk controller.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: June 6, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Shuji Nakamura, Kazuhisa Fujimoto, Hiroki Kanai, Akira Yoshida
  • Publication number: 20060117142
    Abstract: A disk array device is equipped with a plurality of input/output channels that receive data input/output requests from an external device, a plurality of cache memories provided for the corresponding respective input/output channels, each of the cache memories connected to each of the corresponding respective input/output channels, a disk drive device, a disk control module that performs data input/output to and from the disk drive device, and a communication module that communicatively connects the input/output channels with the disk control module. The disk array device also includes a consistency maintaining module that can perform a consistency maintaining processing to maintain consistency of data stored in each of the cache memories. According to the content of the data input/output request received from the external device, an execution order of a response processing to respond to the external device according to the data input/output request and the consistency maintaining processing is controlled.
    Type: Application
    Filed: January 13, 2006
    Publication date: June 1, 2006
    Inventors: Seiji Kaneko, Hiroki Kanai