Patents by Inventor Hiroki Kayoiji

Hiroki Kayoiji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10359926
    Abstract: An information processing apparatus for processing a plurality of event data generated by a processing apparatus for processing a member, includes a determination unit which determines at least two event data existing at a preset interval in a time-series sequence of the plurality of event data, a specification unit which acquires a scroll request containing designation information for designating a position in the sequence from a scroll function incorporated in the information processing apparatus, and specify, as jump destination event data, event data at a position close to the position designated by the designation information in the sequence, among the at least two event data determined by the determination unit, and a control unit which causes the scroll function to start scrolling from or near the jump destination event data.
    Type: Grant
    Filed: February 5, 2014
    Date of Patent: July 23, 2019
    Assignee: Canon Anelva Corporation
    Inventor: Hiroki Kayoiji
  • Patent number: 9362307
    Abstract: An object of the present invention is to provide a method for manufacturing a thin film transistor which enables heat treatment aimed at improving characteristics of a gate insulating film such as lowering of an interface level or reduction in a fixed charge without causing a problem of misalignment in patterning due to expansion or shrinkage of glass. A method for manufacturing a thin film transistor of the present invention comprises the steps of heat-treating in a state where at least a gate insulating film is formed over a semiconductor film on which element isolation is not performed, simultaneously isolating the gate insulating film and the semiconductor film into an element structure, forming an insulating film covering a side face of an exposed semiconductor film, thereby preventing a short-circuit between the semiconductor film and a gate electrode.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: June 7, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuji Yamaguchi, Kengo Akimoto, Hiroki Kayoiji, Toru Takayama
  • Publication number: 20140351747
    Abstract: An information processing apparatus for processing a plurality of event data generated by a processing apparatus for processing a member, includes a determination unit which determines at least two event data existing at a preset interval in a time-series sequence of the plurality of event data, a specification unit which acquires a scroll request containing designation information for designating a position in the sequence from a scroll function incorporated in the information processing apparatus, and specify, as jump destination event data, event data at a position close to the position designated by the designation information in the sequence, among the at least two event data determined by the determination unit, and a control unit which causes the scroll function to start scrolling from or near the jump destination event data.
    Type: Application
    Filed: February 5, 2014
    Publication date: November 27, 2014
    Applicant: CANON ANELVA CORPORATION
    Inventor: Hiroki KAYOIJI
  • Patent number: 8120111
    Abstract: An object of the present invention is to provide a method for manufacturing a thin film transistor which enables heat treatment aimed at improving characteristics of a gate insulating film such as lowering of an interface level or reduction in a fixed charge without causing a problem of misalignment in patterning due to expansion or shrinkage of glass. A method for manufacturing a thin film transistor of the present invention comprises the steps of heat-treating in a state where at least a gate insulating film is formed over a semiconductor film on which element isolation is not performed, simultaneously isolating the gate insulating film and the semiconductor film into an element structure, forming an insulating film covering a side face of an exposed semiconductor film, thereby preventing a short-circuit between the semiconductor film and a gate electrode.
    Type: Grant
    Filed: April 4, 2008
    Date of Patent: February 21, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuji Yamaguchi, Kengo Akimoto, Hiroki Kayoiji, Toru Takayama
  • Publication number: 20110272700
    Abstract: An object of the present invention is to provide a method for manufacturing a thin film transistor which enables heat treatment aimed at improving characteristics of a gate insulating film such as lowering of an interface level or reduction in a fixed charge without causing a problem of misalignment in patterning due to expansion or shrinkage of glass. A method for manufacturing a thin film transistor of the present invention comprises the steps of heat-treating in a state where at least a gate insulating film is formed over a semiconductor film on which element isolation is not performed, simultaneously isolating the gate insulating film and the semiconductor film into an element structure, forming an insulating film covering a side face of an exposed semiconductor film, thereby preventing a short-circuit between the semiconductor film and a gate electrode.
    Type: Application
    Filed: July 19, 2011
    Publication date: November 10, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tetsuji YAMAGUCHI, Kengo AKIMOTO, Hiroki KAYOIJI, Toru TAKAYAMA
  • Publication number: 20080191279
    Abstract: An object of the present invention is to provide a method for manufacturing a thin film transistor which enables heat treatment aimed at improving characteristics of a gate insulating film such as lowering of an interface level or reduction in a fixed charge without causing a problem of misalignment in patterning due to expansion or shrinkage of glass. A method for manufacturing a thin film transistor of the present invention comprises the steps of heat-treating in a state where at least a gate insulating film is formed over a semiconductor film on which element isolation is not performed, simultaneously isolating the gate insulating film and the semiconductor film into an element structure, forming an insulating film covering a side face of an exposed semiconductor film, thereby preventing a short-circuit between the semiconductor film and a gate electrode.
    Type: Application
    Filed: April 4, 2008
    Publication date: August 14, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuji Yamaguchi, Kengo Akimoto, Hiroki Kayoiji, Toru Takayama
  • Patent number: 7374981
    Abstract: An object of the present invention is to provide a method for manufacturing a thin film transistor which enables heat treatment aimed at improving characteristics of a gate insulating film such as lowering of an interface level or reduction in a fixed charge without causing a problem of misalignment in patterning due to expansion or shrinkage of glass. A method for manufacturing a thin film transistor of the present invention comprises the steps of heat-treating in a state where at least a gate insulating film is formed over a semiconductor film on which element isolation is not performed, simultaneously isolating the gate insulating film and the semiconductor film into an element structure, forming an insulating film covering a side face of an exposed semiconductor film, thereby preventing a short-circuit between the semiconductor film and a gate electrode.
    Type: Grant
    Filed: April 9, 2004
    Date of Patent: May 20, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuji Yamaguchi, Kengo Akimoto, Hiroki Kayoiji, Toru Takayama
  • Publication number: 20050012151
    Abstract: An object of the present invention is to provide a method for manufacturing a thin film transistor which enables heat treatment aimed at improving characteristics of a gate insulating film such as lowering of an interface level or reduction in a fixed charge without causing a problem of misalignment in patterning due to expansion or shrinkage of glass. A method for manufacturing a thin film transistor of the present invention comprises the steps of heat-treating in a state where at least a gate insulating film is formed over a semiconductor film on which element isolation is not performed, simultaneously isolating the gate insulating film and the semiconductor film into an element structure, forming an insulating film covering a side face of an exposed semiconductor film, thereby preventing a short-circuit between the semiconductor film and a gate electrode.
    Type: Application
    Filed: September 1, 2004
    Publication date: January 20, 2005
    Inventors: Tetsuji Yamaguchi, Kengo Akimoto, Hiroki Kayoiji, Toru Takayama