Abstract: A memory system according to an embodiment includes a nonvolatile memory and a memory controller. The nonvolatile memory includes a first storage region and a second storage region. The memory controller comprises a third storage region storing a master table and a fourth storage region storing a change history of the master table. The memory controller is configured to: order the nonvolatile memory to write the master table stored in the third storage region in the first storage region when receiving a power-off command from outside; order the nonvolatile memory to write the change history stored in the fourth storage region in the second storage region.

Abstract: A memory system according to an embodiment includes a nonvolatile memory and a memory controller. The nonvolatile memory includes a first storage region and a second storage region. The memory controller comprises a third storage region storing a master table and a fourth storage region storing a change history of the master table. The memory controller is configured to: order the nonvolatile memory to write the master table stored in the third storage region in the first storage region when receiving a power-off command from outside; order the nonvolatile memory to write the change history stored in the fourth storage region in the second storage region.

Abstract: Provided is an environment in which balance information can be easily confirmed when a virtual currency is settled. The intermediary web page 110 corresponds to a URL address based on the merchandise identification information of the merchandise selected by a purchaser on the merchant web page 100. The authentication unit 120 authenticates the purchaser who has accessed the intermediary web page via the merchant web page 100. The acquisition unit 130 accesses the block chain based on the registration information of the purchaser authenticated by the authentication unit 120 to acquire the balance information of the virtual currency of the purchaser. The reflecting unit 140 reflects the balance information acquired by the acquiring unit 130 on the intermediary web page 110.

Abstract: A memory system comprises a first memory including physical blocks, a second memory storing a first correspondence table in which a logical cluster address corresponding to an address assigned to data received from a host is correlated with a logical group number corresponding to a block group and a logical cluster number corresponding to a location within the block group, and a second correspondence table in which first physical block numbers corresponding to first physical blocks are correlated with a first logical group number and second physical block numbers corresponding to second physical blocks are correlated with a second logical group number, and a controller circuit that updates the first correspondence table when new data is written to the first physical blocks, and the second correspondence table, without changing the first corresponding table, when data is moved from the first to the second physical blocks.

Abstract: According to one embodiment, a memory system writes data to a first block, and executes a garbage collection when the number of free blocks is not greater than a first threshold value. The memory system calculates a first number which is a ratio of the number of copy destination blocks needed for the garbage collection to the number of blocks to which data designated by a write command is written. The memory system determines whether the first number is greater than a second threshold value when a first command is received from the host, and performs fill-up processing for the first block when the first number is not greater than the second threshold value.

Abstract: A memory system comprises a first memory including physical blocks, a second memory storing a first correspondence table in which a logical cluster address corresponding to an address assigned to data received from a host is correlated with a logical group number corresponding to a block group and a logical cluster number corresponding to a location within the block group, and a second correspondence table in which first physical block numbers corresponding to first physical blocks are correlated with a first logical group number and second physical block numbers corresponding to second physical blocks are correlated with a second logical group number, and a controller circuit that updates the first correspondence table when new data is written to the first physical blocks, and the second correspondence table, without changing the first corresponding table, when data is moved from the first to the second physical blocks.

Abstract: According to one embodiment, a memory system is connectable to a host. The memory system includes a non-volatile memory and a memory controller. The non-volatile memory includes a storage area in which data received from the host is stored. The memory controller executes data transfer between the host and the memory. The memory controller executes garbage collection in a case where the quantity of vacant areas in the storage area is less than a threshold. The memory controller adjusts the threshold so that the threshold does not exceed over-provisioning capacity.

Abstract: According to one embodiment, the memory system includes a nonvolatile memory including a plurality of blocks, and a controller circuit that controls execution of a data writing process and a garbage collection process. Each of the blocks is an unit of erasure. The data writing process includes a process of writing user data into the nonvolatile memory in accordance with a request from an external member. The garbage collection process includes a process of moving valid data in at least a first block into a second block among the blocks and invalidating the valid data in the first block to be erasable. Upon receiving a data write request from the external member, the controller circuit controls a length of a waiting time to be provided before or after the data writing process within a period from receiving the write request to returning a response to the external member.

Abstract: According to one embodiment, a memory system writes data to a first block, and executes a garbage collection when the number of free blocks is not greater than a first threshold value. The memory system calculates a first number which is a ratio of the number of copy destination blocks needed for the garbage collection to the number of blocks to which data designated by a write command is written. The memory system determines whether the first number is greater than a second threshold value when a first command is received from the host, and performs fill-up processing for the first block when the first number is not greater than the second threshold value.

Abstract: According to one embodiment, a memory system writes data to a first block, and executes a garbage collection when the number of free blocks is not greater than a first threshold value. The memory system calculates a first number which is a ratio of the number of copy destination blocks needed for the garbage collection to the number of blocks to which data designated by a write command is written. The memory system determines whether the first number is greater than a second threshold value when a first command is received from the host, and performs fill-up processing for the first block when the first number is not greater than the second threshold value.

Abstract: According to one embodiment, a memory system writes data to a first block, and executes a garbage collection when the number of free blocks is not greater than a first threshold value. The memory system calculates a first number which is a ratio of the number of copy destination blocks needed for the garbage collection to the number of blocks to which data designated by a write command is written. The memory system determines whether the first number is greater than a second threshold value when a first command is received from the host, and performs fill-up processing for the first block when the first number is not greater than the second threshold value.

Abstract: According to one embodiment, a memory system includes a nonvolatile memory including a plurality of blocks, and a controller controlling the nonvolatile memory. The controller cyclically executes patrol read, the patrol read including reading data and testing the read data, the read data being data of pages connected to some of word lines in each of the blocks of the nonvolatile memory.

Abstract: According to one embodiment, a memory system includes non-volatile memory, a block management table that stores whether data in the non-volatile memory is valid or invalid in a unit of cluster, and a controller configured to execute compaction. In the block management table, first information related to likelihood that valid data within the block is invalidated is registered for each of the blocks. The controller is configured to select a block to be a target of the compaction based on the first information and use the selected block to execute the compaction.

Abstract: A memory system in embodiments includes a nonvolatile semiconductor memory that stores user data, a forward lookup address translation table and a reverse lookup address translation table, and a controller. The controller is configured to determine that the user data stored in the nonvolatile semiconductor memory is valid or invalid based on these two tables. The controller may perform data organizing of selecting data determined valid and rewriting the data in a new block. The controller may perform write processing and rewriting processing to the new block alternately at a predetermined ratio. The controller may determine whether a predetermined condition is satisfied on a basis of addresses included in write requests and write data in the MLC mode when the condition is satisfied and write data in the SLC mode when the condition is not satisfied.

Abstract: A memory system includes a controlling unit that configured to control data transfer between the first and the second memory. The controlling unit executes copy processing for, after reading out data stored in a first page of the second memory to the first memory, writing the data in a second page of the second memory, determines, when executing the copy processing, whether the error correction processing for the data read out from the first page is successful, stores, when the error correction processing is successful, corrected data in the first memory and writes the corrected data in the second page, and reads out, when the error correction processing is unsuccessful, the data from the first page to the first memory and writes the data not subjected to the error correction processing in the second page.

Abstract: A controller performs a coding process based on a first frame including data of a plurality of pages connected to first word lines being a predetermined number of consecutive word lines in a block, and performs, when padding data is written to a plurality of pages connected to second word lines being the predetermined number of word lines subsequent to the first word lines, the coding process based on a second frame obtained by excluding the padding data from a frame including data of the pages connected to the second word lines.

Abstract: According to one embodiment, a memory system includes a nonvolatile semiconductor memory and a controller. The nonvolatile semiconductor memory includes a plurality of parallel operation elements each having a plurality of physical blocks. The controller drives the plurality of parallel operation elements in parallel. The controller associates each of a plurality of logical blocks with a plurality of physical blocks each belonging to different parallel operation elements. The controller levels, among the plurality of logical blocks, the numbers of Bad blocks included in the plurality of physical blocks being associated with each of the plurality of logical blocks.

Abstract: According to one embodiment, a memory system includes a first memory, a second memory, and a processor. The second memory stores first management information and second management information. The first management information has an information that associates a logical address with a physical address. The second management information has an information which has a volume of valid data in each block included in the first memory. The controller updates the first management information and the second management information. When saving a differential data in the first memory, the controller stores the differential data and the second management information in one page of the first memory. The differential data is a difference between before and after update of the first management information. When restoring the second management information, the controller loads to the second memory the second management information stored in the first memory.

Abstract: According to one embodiment, a memory system includes a nonvolatile memory including a plurality of blocks, and a controller controlling the nonvolatile memory. The controller cyclically executes patrol read, the patrol read including reading data and testing the read data, the read data being data of pages connected to some of word lines in each of the blocks of the nonvolatile memory.

Abstract: According to an embodiment, a controller performs a coding process based on a first frame including data of a plurality of pages connected to first word lines being a predetermined number of consecutive word lines in a block, and performs, when padding data is written to a plurality of pages connected to second word lines being the predetermined number of word lines subsequent to the first word lines, the coding process based on a second frame obtained by excluding the padding data from a frame including data of the pages connected to the second word lines.