Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.

Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.

Abstract: An electronic apparatus that includes a CPU and at least one device and that is identical to or different from an electronic apparatus in which the CPU is capable of simultaneously executing multiple applications. The electronic apparatus includes: a determiner that determines usage rates of the CPU and the device for each application being executed, on the basis of at least one of statistical information and log information of the CPU and the device; a divider that determines proportions of power consumptions of the CPU and the device relative to a power consumption of the entire electronic apparatus; and an estimator that estimates a proportion of a power consumption for each application relative to the power consumption of the entire electronic apparatus, on the basis of the determined usage rates and the determined proportions.

Abstract: There is provided an information processing apparatus including a rewrite frequency management section configured to manage a rewrite frequency of a page included in a nonvolatile primary storage apparatus having an upper limit in the rewrite frequency, and a data processing section configured, when an instruction for writing write data to a predetermined page is issued and a rewrite frequency of the predetermined page reaches a threshold value that is less than the upper limit of the rewrite frequency of the primary storage apparatus, to write the write data to another page different from the predetermined page, the other page storing no effective data and having a rewrite frequency that does not reach the threshold value.

Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.

Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.

Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.

Abstract: An information processing apparatus includes a main storage device, in which the main storage device includes a non-volatile storage unit and a volatile storage unit, and a page is moved between the non-volatile storage unit and the volatile storage unit at a predetermined timing based on a priority that is assigned to the page.

Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.

Abstract: There is provided an information processing apparatus including one host controller which communicates with other devices via multiple ports, a monitoring unit which monitors an amount of traffic for each of the ports, a processing unit which gives notification of an required amount of traffic for performing predetermined processing by a device connected to a certain port of the multiple ports, and a communication control unit which controls an amount of traffic for each of the ports, based on a required amount of traffic, notification of which is given from the processing unit, and an actual amount of traffic acquired by the monitoring unit.

Abstract: There is provided an information processing apparatus including circuitry configured to generate an instruction for running an application, and reserve a computer resource for running each of virtual machines corresponding to applications which are running instruction targets, in response to the generation of the running instruction.

Abstract: An electronic apparatus that includes a CPU and at least one device and that is identical to or different from an electronic apparatus in which the CPU is capable of simultaneously executing multiple applications. The electronic apparatus includes: a determiner that determines usage rates of the CPU and the device for each application being executed, on the basis of at least one of statistical information and log information of the CPU and the device; a divider that determines proportions of power consumptions of the CPU and the device relative to a power consumption of the entire electronic apparatus; and an estimator that estimates a proportion of a power consumption for each application relative to the power consumption of the entire electronic apparatus, on the basis of the determined usage rates and the determined proportions.

Abstract: There is provided an information processing apparatus including a primary storage apparatus configured by combining a plurality of memories each having a different upper limit of a number of possible rewrites, and an allocation management section configured to allocate a storage area of data to be stored in the primary storage apparatus to one of the plurality of memories based on a rewrite frequency of the data.

Abstract: There is provided an information processing apparatus including a rewrite frequency management section configured to manage a rewrite frequency of a page included in a nonvolatile primary storage apparatus having an upper limit in the rewrite frequency, and a data processing section configured, when an instruction for writing write data to a predetermined page is issued and a rewrite frequency of the predetermined page reaches a threshold value that is less than the upper limit of the rewrite frequency of the primary storage apparatus, to write the write data to another page different from the predetermined page, the other page storing no effective data and having a rewrite frequency that does not reach the threshold value.

Abstract: There is provided an information processing apparatus including a table saving unit configured to copy an address conversion table stored in a first storage area of a memory to a storage area other than the first storage area and save the copied address conversion table, a table recovery unit configured to recover the address conversion table of a saving time point by copying the saved address conversion table to the first storage area of the memory, and a rewrite control unit configured to, when there is a rewrite request for data of a virtual address associated with a physical address on the address conversion table after the address conversion table has been saved, change the physical address associated with the virtual address, and cause the rewritten data to be stored in a storage area corresponding to the changed physical address.

Abstract: There is provided an information processing apparatus, including an acquiring unit that acquires first information representing at least one of a characteristic and a status of delivery data and second information representing at least one of a characteristic and a status of a terminal in which the delivery data is usable, a comparing unit that compares the first information and the second information acquired by the acquiring unit, and determines whether or not the delivery data is usable in the terminal, and a presentation information generating unit that generates information of the delivery data usable in the terminal based on a determination result of the comparing unit as presentation information.

Abstract: There is provided a memory control apparatus including a deciding unit deciding, among a first main storage apparatus that is a main storage apparatus with low power consumption and a second main storage apparatus with power consumption higher than the power consumption of the first main storage apparatus as memory devices of multiple CPU cores, whether the second main storage apparatus is capable of being suspended, and a power managing unit suppressing a power supplied to the second main storage apparatus and at least one of the multiple CPU cores in a case where the deciding unit decides that the second main storage apparatus is capable of being suspended.

Abstract: A paper money processor according to the present invention includes a transaction slot where paper money is at least either inserted or dispensed with an orientation such that one of lengthwise ends of the paper money is positioned at a side of a first lengthwise end of the transaction slot. The transaction slot includes a main opening which opens on a second lengthwise end of the transaction slot, and a lateral opening which is continuous with the main opening, and opens on a first widthwise end of the transaction slot.

Abstract: There is provided an information processing apparatus including a comparison unit for comparing intermediate code converted from a source code of the program being developed with an intermediate code of the program stored in a database in the system development. The information processing apparatus also includes a similarity calculation unit for calculating a similarity between the programs based on a comparison result obtained by the comparison unit. A narrowing-down process is performed for a candidate to be recommended using additional information as occasion demands. The present disclosure can apply to the information processing method.

Abstract: A memory manager secures memory areas according to requests from programs and sets ranks designated by the programs to the secured memory areas. The memory manager selects a memory area released on the basis of the rank of each memory area, from the secured memory areas, when an available capacity of a main storage device is insufficient. The memory manager releases the selected memory area and secures a new memory area. The present disclosure can be applied to an embedded apparatus.