Abstract: A memory device that can be highly integrated is provided. The memory device includes a first transistor and a second transistor in a memory cell, and small-area vertical transistors each including a channel formation region on a side surface of an opening portion provided in an insulating layer are used as the two transistors. The memory cell includes a conductor having a function of a gate electrode of the first transistor and a function of one of a source electrode and a drain electrode of the second transistor. The memory cells are placed in a staggered arrangement, so that the memory device can be highly integrated.

Abstract: An object detection device includes: a peripheral information acquiring unit to acquire peripheral information including detection information for each of detection points detected by sensing a periphery of a current position; a vehicle information acquiring unit to acquire vehicle information including a current position and a state of a vehicle present at the current position; a map information acquiring unit to acquire map information including a peripheral area of a current position; a traveling status recognizing unit to output traveling status information indicating a traveling state of a vehicle present at a current position and a status around the vehicle by using the peripheral information, the vehicle information, and the map information; and a peripheral information updating unit to output, for each of the detection points, information indicating certainty relating to a detection point by using the traveling status information.

Abstract: A method of manufacturing light emitting elements includes: providing a wafer including a substrate formed of sapphire and having a first main surface and a second main surface, and a semiconductor layered body disposed on the first main surface of the substrate; irradiating a laser beam into the substrate to form a modified region inside the substrate, the modified region having a crack reaching the first main surface and a crack reaching the second main surface; irradiating CO2 laser to a region of the substrate overlapping with a region to which the laser beam has been irradiated; and cleaving the wafer along the modified region to obtain the light emitting elements each having a hexagonal shape in a plan view.

Abstract: A seat slider device may include a lower rail attachable to a body of a vehicle; a belt arranged along a longitudinal direction of the lower rail and having both ends thereof fixed; and an upper rail attachable to a seat, slidably engaging with the lower rail, and including an actuator configured to feed the belt. The actuator may be configured to apply a drive force on a lower surface of the belt.

Abstract: A method of manufacturing light emitting elements includes: providing a wafer including a substrate formed of sapphire and having a first main surface and a second main surface, and a semiconductor layered body disposed on the first main surface of the substrate; irradiating a laser beam into the substrate to form a modified region inside the substrate, the modified region having a crack reaching the first main surface and a crack reaching the second main surface; irradiating CO2 laser to a region of the substrate overlapping with a region to which the laser beam has been irradiated; and cleaving the wafer along the modified region to obtain the light emitting elements each having a hexagonal shape in a plan view.

Abstract: A seat slider device may include a lower rail attachable to a body of a vehicle; a belt arranged along a longitudinal direction of the lower rail and having both ends thereof fixed; and an upper rail attachable to a seat, slidably engaging with the lower rail, and including an actuator configured to feed the belt. The actuator may be configured to apply a drive force on a lower surface of the belt.

Abstract: A method for manufacturing a semiconductor element is provided. The method includes providing a semiconductor wafer including a substrate and a semiconductor structure on the substrate, forming a cleavage starting portion in the semiconductor wafer, and dividing the semiconductor wafer into a plurality of semiconductor elements by transferring a pressing member on the semiconductor wafer in a state where the pressing member is pressed against the semiconductor wafer to separate the semiconductor wafer at the cleavage starting portion. The pressing member includes a tip portion to be pressed on the semiconductor wafer, and the tip portion has a spherical surface.

Abstract: A method for manufacturing a semiconductor element is provided. The method includes providing a semiconductor wafer including a substrate and a semiconductor structure on the substrate, forming a cleavage starting portion in the semiconductor wafer, and dividing the semiconductor wafer into a plurality of semiconductor elements by transferring a pressing member on the semiconductor wafer in a state where the pressing member is pressed against the semiconductor wafer to separate the semiconductor wafer at the cleavage starting portion. The pressing member includes a tip portion to be pressed on the semiconductor wafer, and the tip portion has a spherical surface.

Abstract: An integrated circuit device includes a first and a second semiconductor regions, a first electrode provided above the first semiconductor region, a second electrode provided above the second semiconductor region, a first and a second interconnects. The first and the second semiconductor regions are arranged to be separated from each other in a first direction. Longitudinal directions of the first and second semiconductor regions are a second direction. Longitudinal directions of the first and second electrode are a third direction. The first and second interconnects extend in the first direction and are provided in a region including a region directly above the first electrode and a region directly above the second electrode. The first interconnect is connected to the first electrode. The second interconnect is connected to the second electrode.

Abstract: A method for manufacturing a semiconductor element is provided. The method includes providing a semiconductor wafer including a substrate and a semiconductor structure on the substrate, forming a cleavage starting portion in the semiconductor wafer, and dividing the semiconductor wafer into a plurality of semiconductor elements by transferring a pressing member on the semiconductor wafer in a state where the pressing member is pressed against the semiconductor wafer to separate the semiconductor wafer at the cleavage starting portion. The pressing member includes a tip portion to be pressed on the semiconductor wafer, and the tip portion has a spherical surface.

Abstract: A memory device includes a first interconnect extending in a first direction, a first and a second semiconductor members extending in a second direction, a first and a second gate lines extending in a third direction, a second and a third interconnects extending in the second direction. The first and the second semiconductor members are arranged along the first direction, with first ends in the second direction connected to the first interconnect. The second interconnect is connected to a second end in the second direction of the first semiconductor member. The third interconnect is connected to a second end in the second direction of the second semiconductor member. The distance between the first interconnect and the first gate line is longer than the distance between the first interconnect and the second gate line.

Abstract: A memory device includes a first interconnect extending in a first direction, a first and a second semiconductor members extending in a second direction, a first and a second gate lines extending in a third direction, a second and a third interconnects extending in the second direction. The first and the second semiconductor members are arranged along the first direction, with first ends in the second direction connected to the first interconnect. The second interconnect is connected to a second end in the second direction of the first semiconductor member. The third interconnect is connected to a second end in the second direction of the second semiconductor member. The distance between the first interconnect and the first gate line is longer than the distance between the first interconnect and the second gate line.

Abstract: An integrated circuit device includes a first and a second semiconductor regions, a first electrode provided above the first semiconductor region, a second electrode provided above the second semiconductor region, a first and a second interconnects. The first and the second semiconductor regions are arranged to be separated from each other in a first direction. Longitudinal directions of the first and second semiconductor regions are a second direction. Longitudinal directions of the first and second electrode are a third direction. The first and second interconnects extend in the first direction and are provided in a region including a region directly above the first electrode and a region directly above the second electrode. The first interconnect is connected to the first electrode. The second interconnect is connected to the second electrode.

Abstract: According to one embodiment, the contact electrode extends in the inter-layer insulating layer toward the second semiconductor region. The metal silicide film is in contact with the second semiconductor region and the contact electrode. The metal silicide film includes a first part and a second part. The first part is provided between a bottom of the contact electrode and the second semiconductor region. The second part is provided on a surface of the second semiconductor region between the first part and the gate electrode. A bottom of the second part is located at a position shallower than a bottom the first part.

Abstract: A method for manufacturing a semiconductor element is provided. The method includes providing a semiconductor wafer including a substrate and a semiconductor structure on the substrate, forming a cleavage starting portion in the semiconductor wafer, and dividing the semiconductor wafer into a plurality of semiconductor elements by transferring a pressing member on the semiconductor wafer in a state where the pressing member is pressed against the semiconductor wafer to separate the semiconductor wafer at the cleavage starting portion. The pressing member includes a tip portion to be pressed on the semiconductor wafer, and the tip portion has a spherical surface.

Abstract: According to one embodiment, the contact electrode extends in the inter-layer insulating layer toward the second semiconductor region. The metal silicide film is in contact with the second semiconductor region and the contact electrode. The metal silicide film includes a first part and a second part. The first part is provided between a bottom of the contact electrode and the second semiconductor region. The second part is provided on a surface of the second semiconductor region between the first part and the gate electrode. A bottom of the second part is located at a position shallower than a bottom the first part.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate; a memory cell array including a plurality of memory cells and stacked on the substrate; a first transistor; an interlayer insulating layer covering the first transistor; and a first contact portion. The first transistor includes a first gate insulating film which is disposed on the substrate, a first gate electrode which is disposed on the first gate insulating film, and a first semiconductor layer which includes an upper surface at a higher position than an interface between the substrate and the first gate insulating film and a bottom surface at a deeper position than the interface between the substrate and the first gate insulating film. The first contact portion penetrates the interlayer insulating layer to reach the first semiconductor layer and connects the plurality of memory cells and the first transistor electrically.

Abstract: A semiconductor device may include a p-channel semiconductor active region and an n-channel semiconductor active region. An element isolation insulating layer electrically isolates the p-channel semiconductor active region from the n-channel semiconductor active region. An insulating layer made of a different material, being in contact with both ends, in its channel length direction, of the p-channel semiconductor active region applies a compression stress in the channel length direction to a channel of the p-channel semiconductor active region. The p-channel semiconductor active region is surrounded by the insulating layer, in the channel length direction, of the p-channel semiconductor active region and by the element isolation insulating layer, parallel to the channel length direction, of the p-channel semiconductor active region. The n-channel semiconductor active region is surrounded by the element isolation insulating layer.

Abstract: A bimetallic tube comprising a copper tube and a steel tube within the copper tube. The copper tube is drawn down such that the inside wall surface of the copper tube is in intimate contact with the outside wall surface of the steel tube, and the copper tube is annealed.

Abstract: A semiconductor device according to an embodiment includes: a semiconductor substrate; a gate electrode formed on the semiconductor substrate via a gate insulating film; a channel region formed in a region of the semiconductor substrate below the gate electrode; an epitaxial crystal layer containing a conductive impurity, which is formed sandwiching the channel region and has a function as a source region and a drain region, and formed on a recess in the semiconductor substrate; and a growth suppressing portion formed on the recess in the semiconductor substrate, and configured to suppress an epitaxial growth of a crystal in the epitaxial layer from the semiconductor substrate.