Patents by Inventor Hiroki Ose
Hiroki Ose has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11938444Abstract: Provided is a moisture absorbent in liquid form that can effectively inhibit oil bleeding after application. The present invention relates to a moisture absorbent in liquid form, which is a liquid composition including a moisture absorbable particle and a binder, wherein (1) the binder includes a two-liquid component type silicone, and (2) a viscosity (20° C.) as the liquid composition is 10 to 300 Pa·s.Type: GrantFiled: June 7, 2019Date of Patent: March 26, 2024Assignee: DYNIC CORPORATIONInventors: Yoshiyuki Matsui, Hiroki Ohashi, Nobuo Ose, Kaneto Ohyama
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Patent number: 7270708Abstract: A susceptor (10) supporting a semiconductor substrate (W) in a vapor phase growth, wherein a pocket (11) is formed on an upper surface of the susceptor to arrange the semiconductor substrate (W) inside thereof. The pocket (11) has a two-stage structure having an upper stage pocket (11a) for supporting an outer peripheral edge portion of the semiconductor substrate (W) and a lower stage pocket (11b) formed on a lower stage of a center side from the upper stage pocket (11a). A hole (12) penetrated to a rear surface of the susceptor and opened in the vapor phase growth is formed in the lower stage pocket (11b).Type: GrantFiled: November 27, 2002Date of Patent: September 18, 2007Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Tomosuke Yoshida, Takeshi Arai, Kenji Akiyama, Hiroki Ose
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Publication number: 20060281326Abstract: The present invention provides a cleaning apparatus, a cleaning system and a cleaning method for a member used in the semiconductor field, excellent in cleaning capability and good in operation efficiency. The present invention is directed to a cleaning apparatus for cleaning the member used in the semiconductor field, which comprises: one nozzle or plural nozzles; and a jet mechanism for jetting a mist-like cleaning liquid (L1) with a high pressure from the one nozzle or the plural nozzles (52a) to the member (T) to be cleaned.Type: ApplicationFiled: April 6, 2004Publication date: December 14, 2006Inventors: Hiroki Ose, Shuji Yokota
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Patent number: 7060944Abstract: A heat treatment apparatus (100) having: a susceptor (2) rotatably provided in a heat treatment vessel (1), on which a wafer (W) is placed; a preheat ring (3) surrounding a periphery of the susceptor (2) to be close to and in non-contact with the susceptor, which is supported by a base (4) provided in the heat treatment vessel (1); and a heating apparatus (8) for heating a wafer (W) placed on the susceptor (2), wherein the preheat ring (3) is formed such that an inner peripheral center (31a) is eccentric to an outer periphery (32). The preheat ring (3) is moved around the susceptor (2); the preheat ring (3) is positioned to minimize a distance between the inner peripheral center (31a) of the preheat ring (3) and the center (2b) of the susceptor (2); and thereafter a heat treatment is performed to a wafer (W).Type: GrantFiled: January 22, 2003Date of Patent: June 13, 2006Assignee: Shin-Etsu Handotai Co., Ltd.Inventor: Hiroki Ose
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Publication number: 20050106524Abstract: A heat treatment apparatus (100) having: a susceptor (2) rotatably provided in a heat treatment vessel (1), on which a wafer (W) is placed; a preheat ring (3) surrounding a periphery of the susceptor (2) to be close to and in non-contact with the susceptor, which is supported by a base (4) provided in the heat treatment vessel (1); and a heating apparatus (8) for heating a wafer (W) placed on the susceptor (2), wherein the preheat ring (3) is formed such that an inner peripheral center (31a) is eccentric to an outer periphery (32). The preheat ring (3) is moved around the susceptor (2); the preheat ring (3) is positioned to minimize a distance between the inner peripheral center (31a) of the preheat ring (3) and the center (2b) of the susceptor (2); and thereafter a heat treatment is performed to a wafer (W).Type: ApplicationFiled: January 22, 2003Publication date: May 19, 2005Inventor: Hiroki Ose
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Publication number: 20040255843Abstract: A susceptor (10) supporting a semiconductor substrate (W) in a vapor phase growth, wherein a pocket (11) is formed on an upper surface of the susceptor to arrange the semiconductor substrate (W) inside thereof. The pocket (11) has a two-stage structure having an upper stage pocket (11a) for supporting an outer peripheral edge portion of the semiconductor substrate (W) and a lower stage pocket (11b) formed on a lower stage of a center side from the upper stage pocket (11a). A hole (12) penetrated to a rear surface of the susceptor and opened in the vapor phase growth is formed in the lower stage pocket (11b).Type: ApplicationFiled: April 20, 2004Publication date: December 23, 2004Inventors: Tomosuke Yoshida, Takeshi Arai, Kenji Akiyama, Hiroki Ose
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Patent number: 6814811Abstract: It is an object of the present invention to provide not only a semiconductor wafer obtained by forming a semiconductor thin film with uniform resistivity and substantially no slip dislocation on a main surface of a semiconductor single crystal substrate having a relatively low dopant concentration, as large as 300 mm or more in diameter but also a vapor phase growth apparatus by means of which such a semiconductor wafer can be produced. A dopant gas is supplied into a reaction chamber 10 through all of the inlet ports 18a to 18f disposed in a width direction of the reaction chamber 10 from a common gas pipe 22a functioning as a main dopant gas pipe. Further, the dopant gas is additionally supplied through inner inlet ports 18a and 18b, and middle inlet ports 18c and 18d, as specific gas inlet ports, into the reaction chamber 10 from first and second auxiliary dopant gas pipes 22b and 22c.Type: GrantFiled: October 4, 2002Date of Patent: November 9, 2004Assignee: Shin-Etsu Handotai Co., Ltd.Inventor: Hiroki Ose
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Patent number: 6746941Abstract: It is an object of the invention to provide a semiconductor wafer obtained by forming a semiconductor thin film with uniform resistivity on a main surface of a semiconductor single crystal substrate of 300 mm or more in diameter. When a process gas is supplied to over a main surface of a silicon single crystal substrate 12 in rotation in almost parallel to the main surface thereof in one direction in a reaction chamber 10 through six inlet ports 18a to 18f disposed in width direction of the reaction chamber 10, H2 gas, a semiconductor raw material gas and a dopant gas are supplied onto an area in the vicinity of the center of the main surface of the silicon single crystal substrate 12 and an intermediate area thereof through the inner inlet ports 18a and 18b and the middle inlet ports 18c and 18d, and only H2 gas and the semiconductor raw material gas without the dopant gas are supplied onto an area in the vicinity of the outer periphery thereof from the outer inlet ports 18e and 18f.Type: GrantFiled: August 23, 2002Date of Patent: June 8, 2004Assignee: Shin-Etsu Handotai Co., Ltd.Inventor: Hiroki Ose
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Patent number: 6589336Abstract: Performing the post-implantation annealing for recovering crystallinity in a hydrogen atmosphere can successfully suppress the surface roughening on the ion-implanted layers without pre-implantation oxidation. This allows omission of the pre-implantation oxidation and allows ion implantation using only a photoresist film as a mask in a method for producing an epitaxial wafer having buried ion-implanted layers. Since an intentional formation of an oxide film, including such pre-implantation oxidation, on an epitaxial layer is omitted, the number of repetition of the thermal history exerted to the buried ion-implanted layers can be reduced, which effectively suppresses lateral diffusion of implanted ions. Since the formation and removal of the oxide film is thus no more necessary, the number of process steps in the production of the epitaxial wafer can dramatically be reduced.Type: GrantFiled: July 10, 2001Date of Patent: July 8, 2003Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Koji Ebara, Hiroki Ose, Yasuo Kasahara
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Publication number: 20030044616Abstract: It is an object of the present invention to provide not only a semiconductor wafer obtained by forming a semiconductor thin film with uniform resistivity and substantially no slip dislocation on a main surface of a semiconductor single crystal substrate having a relatively low dopant concentration, as large as 300 mm or more in diameter but also a vapor phase growth apparatus by means of which such a semiconductor wafer can be produced.Type: ApplicationFiled: October 4, 2002Publication date: March 6, 2003Applicant: Shin-Etsu Handotai, Co., Ltd.Inventor: Hiroki Ose
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Publication number: 20030001160Abstract: It is an object of the invention to provide a semiconductor wafer obtained by forming a semiconductor thin film with uniform resistivity on a main surface of a semiconductor single crystal substrate of 300 mm or more in diameter.Type: ApplicationFiled: August 23, 2002Publication date: January 2, 2003Applicant: Shin-Etsu Handotai Co., Ltd.Inventor: Hiroki Ose
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Patent number: 6475627Abstract: It is the object of the present invention to provide not only a semiconductor wafer obtained by forming a semiconductor thin film with uniform resistivity and substantially no slip dislocation on a main surface of a semiconductor single crystal substrate having a relatively low dopant concentration, as large as 300 mm or more in diameter but also a vapor phase growth apparatus by means of which such a semiconductor wafer can be produced. A dopant gas is supplied into a reaction chamber 10 through all of the inlet ports 18a to 18f disposed in a width direction of the reaction chamber 10 from a common gas pipe 22a functioning as a main dopant gas pipe. Further, the dopant gas is additionally supplied through inner inlet ports 18a and 18b, and middle inlet ports 18c and 18d, as specific gas inlet ports, into the reaction chamber 10 from first and second auxiliary dopant gas pipes 22b and 22c.Type: GrantFiled: June 26, 2000Date of Patent: November 5, 2002Assignee: Shin-Etsu Handotai Co., Ltd.Inventor: Hiroki Ose
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Patent number: 6454854Abstract: It is an object of the invention to provide a semiconductor wafer obtained by forming a semiconductor thin film with uniform resistivity on a main surface of a semiconductor single crystal substrate of 300 mm or more in diameter. When a process gas is supplied to over a main surface of a silicon single crystal substrate 12 in rotation in almost parallel to the main surface thereof in one direction in a reaction chamber 10 through six inlet ports 18a to 18f disposed in width direction of the reaction chamber 10, H2 gas, a semiconductor raw material gas and a dopant gas are supplied onto an area in the vicinity of the center of the main surface of the silicon single crystal substrate 12 and an intermediate area thereof through the inner inlet ports 18a and 18b and the middle inlet ports 18c and 18d, and only H2 gas and the semiconductor raw material gas without the dopant gas are supplied onto an area in the vicinity of the outer periphery thereof from the outer inlet ports 18e and 18f.Type: GrantFiled: June 26, 2000Date of Patent: September 24, 2002Assignee: Shin-Etsu Handotai Co., Ltd.Inventor: Hiroki Ose
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Patent number: 5882401Abstract: A method for manufacturing a silicon single crystal substrate for use of an epitaxial layer growth. The method comprises the steps of: growing a CVD film on a rear surface and a peripheral side portion, of the silicon single crystal substrate; removing a portion of the CVD film on the peripheral side portion in the vicinity of a main surface of the silicon single crystal substrate, which was grown over an end of the peripheral side portion, by an abrasive tape grinding; and thereafter mirror-polishing the main surface of the silicon single crystal substrate.Type: GrantFiled: August 8, 1997Date of Patent: March 16, 1999Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Tamotsu Maruyama, Hiroki Ose