Patents by Inventor Hiroki Tanimura

Hiroki Tanimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11968861
    Abstract: An organic EL display (1) has a bend (B) where a slit (81) is bored in a base coat film (23), gate insulating film (27), first interlayer insulating film (31) and second interlayer insulating film (35). The bend is provided with a filler layer (83) filling the slit and covering both edges of the slit. The filler layer has a protrusion (85) overlapping each edge in the width direction of the slit. A routed wire (7) routed from the display region (D) and then routed over the filler layer to reach a terminal section (T) extends over the protrusion.
    Type: Grant
    Filed: April 4, 2019
    Date of Patent: April 23, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Shinji Ichikawa, Shinsuke Saida, Ryosuke Gunji, Hiroki Taniyama, Tohru Okabe, Akira Inoue, Hiroharu Jinmura, Yoshihiro Nakada, Koji Tanimura
  • Patent number: 11957014
    Abstract: A display device includes: a plurality of control lines; a plurality of power supply lines; a plurality of data signal lines; an oxide semiconductor layer; a first metal layer; a gate insulation film; a first inorganic insulation film; a second metal layer; a second inorganic insulation film; and a third metal layer. The oxide semiconductor layer, in a plan view, contains therein semiconductor lines formed as isolated regions between a plurality of drivers and a display area. The semiconductor lines cross the plurality of control lines and the plurality of power supply lines, are in contact with the plurality of control lines via an opening in a gate insulation film, are in contact with the plurality of power supply lines via an opening in the first inorganic insulation film, and have a plurality of narrowed portions, such that thicker and thinner regions exist along the same line.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: April 9, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Shinsuke Saida, Shinji Ichikawa, Hiroki Taniyama, Ryosuke Gunji, Kohji Ariga, Yoshihiro Nakada, Koji Tanimura, Yoshihiro Kohara, Hiroharu Jinmura, Akira Inoue
  • Patent number: 11950462
    Abstract: A first conductive layer in the same layer as that of a first electrode is coupled to a third conductive layer and a second electrode in the same layer as that of a third metal layer through a slit formed in a flattening film of a non-display area. Second conductive layers in the same layer as that of a second metal layer are provided to overlap with the slit.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: April 2, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Shinsuke Saida, Shinji Ichikawa, Hiroki Taniyama, Ryosuke Gunji, Kohji Ariga, Yoshihiro Nakada, Koji Tanimura, Yoshihiro Kohara, Akira Inoue, Hiroharu Jinmura, Takeshi Yaneda
  • Publication number: 20240094620
    Abstract: Provided is an EUV transmissive membrane including a main layer having an EUV transmittance of 85% or more at a wavelength of 13.5 nm, wherein the main layer is composed of a monolayer or a composite layer of two or more layers, and a protective layer that covers at least one side of the main layer, wherein the protective layer includes at least one selected from the group consisting of amorphous carbon, Cu, Al, and an organic resist as a main component.
    Type: Application
    Filed: October 10, 2023
    Publication date: March 21, 2024
    Applicant: NGK INSULATORS, LTD.
    Inventors: Naoki GORIKI, Takashi TANIMURA, Toshikatsu KASHIWAYA, Hiroki CHAEN
  • Publication number: 20180223899
    Abstract: Provided is an angular contact ball bearing that can have a load capacity increased by increasing the diameter of each ball and that is suitably used mainly to bear a thrust load. In the angular contact ball bearing, a plurality of balls are rollably interposed between an inner ring raceway groove formed on an outer peripheral surface of an inner ring and an outer ring raceway groove formed on an inner peripheral surface of an outer ring. The plurality of balls are retained by a plurality of separator retainers that are interposed between the adjacent balls and that are spaced apart from each other. A contact angle ? of each ball is within a range of 45° to 65°.
    Type: Application
    Filed: March 30, 2018
    Publication date: August 9, 2018
    Applicant: NTN CORPORATION
    Inventor: Hiroki TANIMURA
  • Publication number: 20180149197
    Abstract: A thrust bearing for a hydro-static transmission according to the present invention is incorporated in a hydro-static transmission and includes: an inner ring which makes contact with pistons of piston chambers of a variable capacity pump; an outer ring fixed to a swash plate; a plurality of balls held between the inner ring and the outer ring via a retainer, where the retainer is made of a synthetic resin provided by polyamide 66, and contains glass fiver at a rate not greater than 10 mass percent. With this arrangement, the present invention prevents breakage of the retainer caused by delayed or speeded balls resulting from an imbalanced load when the pump swash plate varies its slant angle, thereby provides a long-life thrust bearing for a hydro-static transmission.
    Type: Application
    Filed: April 26, 2016
    Publication date: May 31, 2018
    Inventor: Hiroki TANIMURA
  • Publication number: 20160076589
    Abstract: An object of the present invention is to provide a retainer 3 which can be made of a quick-wearing material such as ductile iron (spherical graphite cast iron) like a retainer 3 used in an angular ball bearing for a screw compressor yet can prevent premature wearing of a guide surface. A retainer 3 of an inner ring guide type for a rolling bearing, which makes contact with an inner ring 1 and is guided thereby during operation, has a guide clearance “b” with respect to the inner ring 1, and a pocket clearance “a”. The pocket clearance has a ratio to the guide clearance in a range from 75% through to 100%, which makes it possible to use easy-wearing materials such as ductile iron.
    Type: Application
    Filed: April 21, 2014
    Publication date: March 17, 2016
    Inventor: Hiroki TANIMURA
  • Publication number: 20130224937
    Abstract: Semiconductor layer forming gas is introduced into a reaction chamber, and the gas generates a plasma discharge, so that a semiconductor layer is formed. In addition to the gas, impurity gas is introduced into the chamber, and first conductivity type layer forming gas including the semiconductor layer forming gas and the impurity gas generates a plasma discharge, so that a first conductivity type layer of a first conductivity type is formed so as to cover the semiconductor layer. In the step of forming the first conductivity type layer, a composition set value of gas supplied to the chamber is shifted from a composition of the semiconductor layer forming gas to a composition of the first conductivity type layer forming gas in a state where a pressure in the chamber is not reduced to ultimate vacuum even after a plasma discharge processing for forming the semiconductor layer is terminated.
    Type: Application
    Filed: November 4, 2011
    Publication date: August 29, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Hiroki Tanimura, Yoshiyuki Nasuno, Kuriyo Shimada
  • Publication number: 20130000721
    Abstract: A photoelectric conversion device includes a substrate and a transparent, electrically conductive film covering at least a portion of a major surface of the substrate and having an irregular geometry on a surface thereof closer to a semiconductor layer. Furthermore, the photoelectric conversion device includes a first conduction type semiconductor layer covering at least a portion of the irregular geometry of the transparent, electrically conductive film, and a light absorption layer covering the first conduction type semiconductor layer. The irregular geometry has a bump having a maximum height equal to or larger than 50 nm and equal to or smaller than 1200 nm. The bump has a surface having a submicron recess having local peaks having a spacing equal to or larger than 2 nm and equal to or smaller than 25 nm.
    Type: Application
    Filed: March 31, 2010
    Publication date: January 3, 2013
    Inventors: Yoshiyuki Nasuno, Kazuhito Nishimura, Hiroki Tanimura, Kei Kajihara
  • Patent number: D822082
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: July 3, 2018
    Assignee: NTN CORPORATION
    Inventors: Hiroki Tanimura, Hisanori Aiga
  • Patent number: D829787
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: October 2, 2018
    Assignee: NTN CORPORATION
    Inventors: Hiroki Tanimura, Hisanori Aiga
  • Patent number: D836144
    Type: Grant
    Filed: August 16, 2016
    Date of Patent: December 18, 2018
    Assignee: NTN CORPORATION
    Inventors: Hiroki Tanimura, Hideyuki Mitani