Patents by Inventor Hiroki Tojinbara
Hiroki Tojinbara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240313030Abstract: A first light-receiving element of an embodiment of the disclosure includes: a semiconductor substrate including a photoelectric conversion region; a first first electrically-conductive region provided at a first surface interface of the semiconductor substrate and coupled to a first electrode; a second first electrically-conductive region provided around the first first electrically-conductive region and coupled to a second electrode, at the first surface interface; a third first electrically-conductive region in an electrically floating state provided around the second first electrically-conductive region, at the first surface interface; a first second electrically-conductive region having a different electrically-conductive type between the first first electrically-conductive region and the second first electrically-conductive region, at the first surface interface; and a fourth first electrically-conductive region provided at least between the first first electrically conductive region and the first seconType: ApplicationFiled: March 25, 2022Publication date: September 19, 2024Applicants: SONY SEMICONDUCTOR SOLUTIONS CORPORATION, RIKENInventors: Takahiro KAWAMURA, Hiroki TOJINBARA, Takaki HATSUI, Shinichi YOSHIDA, Keiichi NAKAZAWA, Hikaru IWATA, Kazunobu OTA, Takuya MARUYAMA, Hiroaki ISHIWATA, Chihiro ARAI, Atsuhiro ANDO, Toru SHIRAKATA, Hisahiro ANSAI, Satoe MIYATA, Ryu KAMIBABA, Yusuke UESAKA, Yukari TAKEYA
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Publication number: 20240258356Abstract: An imaging device including: a first semiconductor substrate; a second semiconductor substrate; and a wiring layer. The first semiconductor substrate has a first surface and a second surface and includes a sensor pixel. The second semiconductor substrate has a third surface and a fourth surface and includes a readout circuit that outputs a pixel signal based on an output from the sensor pixel. The second semiconductor substrate is stacked on the first semiconductor substrate with the first surface and the fourth surface opposed to each other. The wiring layer is between the first semiconductor substrate and the second semiconductor substrate and includes a first wiring line and a second wiring line that are electrically coupled to each other. One of the first wiring line and the second wiring line is in an electrically floating state while the other is electrically coupled to a transistor.Type: ApplicationFiled: April 8, 2024Publication date: August 1, 2024Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Hiroki TOJINBARA
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Publication number: 20240194701Abstract: A light-receiving element according to an embodiment of the present disclosure includes: a semiconductor substrate including a photoelectric conversion region; a first first electrically-conductive region provided at an interface of a first surface of the semiconductor substrate and coupled to a first electrode; a second first electrically-conductive region provided at the interface of the first surface and around the first first electrically-conductive region and coupled to a second electrode; a third first electrically-conductive region provided at the interface of the first surface and around the second first electrically-conductive region and being in an electrically floating state; and an electrically-conductive film provided above the first surface at least between the first first electrically-conductive region and the second first electrically-conductive region.Type: ApplicationFiled: March 25, 2022Publication date: June 13, 2024Applicants: SONY SEMICONDUCTOR SOLUTIONS CORPORATION, RIKENInventors: Takaki HATSUI, Takahiro KAWAMURA, Hiroki TOJINBARA, Kazunobu OTA, Toru SHIRAKATA, Hikaru IWATA, Atsuhiro ANDO
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Publication number: 20240186340Abstract: A light-receiving element according to an embodiment of the present disclosure includes: a semiconductor substrate (11) including a photoelectric conversion region; a first electrically-conductive region (13A) provided at an interface of one surface of the semiconductor substrate (11) and coupled to a first electrode (16); a second first electrically-conductive region (13B) provided at the interface of the one surface and around the first first electrically-conductive region (13A) and coupled to a second electrode (17); and a third first electrically-conductive region (13C) provided at the interface of the one surface and around the second first electrically-conductive region (13B) and being in an electrically floating state.Type: ApplicationFiled: March 25, 2022Publication date: June 6, 2024Inventors: Takaki HATSUI, Takahiro KAWAMURA, Hiroki TOJINBARA
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Publication number: 20240163587Abstract: To prevent a decrease in a saturation charge when a phase difference signal is generated. A pixel includes a plurality of photoelectric conversion sections that is formed on a semiconductor substrate and performs photoelectric conversion of incident light from a subject to generate a charge. An intra-pixel separator separates the plurality of photoelectric conversion sections. An overflow path in the intra-pixel separator transfers charges overflowed in the plurality of photoelectric conversion sections to each other. An overflow gate in the pixel and adjusts a potential of the overflow path. A pixel separator is disposed at a boundary between the pixels. A charge holding section holds the generated charge. A charge transfer section is disposed one-by-one for the plurality of photoelectric conversion sections and transfers the generated charge to the charge holding section. An image signal generating section generates an image signal on the basis of the generated charge.Type: ApplicationFiled: January 26, 2022Publication date: May 16, 2024Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Toshihiro ASAHI, Hiroki TOJINBARA
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Patent number: 11973102Abstract: An imaging device including: a first semiconductor substrate; a second semiconductor substrate; and a wiring layer. The first semiconductor substrate has a first surface and a second surface and includes a sensor pixel. The second semiconductor substrate has a third surface and a fourth surface and includes a readout circuit that outputs a pixel signal based on an output from the sensor pixel. The second semiconductor substrate is stacked on the first semiconductor substrate with the first surface and the fourth surface opposed to each other. The wiring layer is between the first semiconductor substrate and the second semiconductor substrate and includes a first wiring line and a second wiring line that are electrically coupled to each other. One of the first wiring line and the second wiring line is in an electrically floating state while the other is electrically coupled to a transistor.Type: GrantFiled: November 19, 2020Date of Patent: April 30, 2024Assignee: Sony Semiconductor Solutions CorporationInventor: Hiroki Tojinbara
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Publication number: 20240113145Abstract: A solid-state imaging device as disclosed includes a semiconductor layer having a light incidence surface and an element formation surface. The semiconductor layer includes a plurality of photoelectric conversion units including a first photoelectric conversion portion, a second photoelectric conversion portion, an isolation portion, a charge accumulation region, a first transfer transistor capable of transferring a signal charge from the first photoelectric conversion portion to the charge accumulation region, and a second transfer transistor capable of transferring a signal charge from the second photoelectric conversion portion to the charge accumulation region.Type: ApplicationFiled: February 3, 2022Publication date: April 4, 2024Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Hiroki TOJINBARA
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Publication number: 20220392942Abstract: An imaging device including: a first semiconductor substrate; a second semiconductor substrate; and a wiring layer. The first semiconductor substrate has a first surface and a second surface and includes a sensor pixel. The second semiconductor substrate has a third surface and a fourth surface and includes a readout circuit that outputs a pixel signal based on an output from the sensor pixel. The second semiconductor substrate is stacked on the first semiconductor substrate with the first surface and the fourth surface opposed to each other. The wiring layer is between the first semiconductor substrate and the second semiconductor substrate and includes a first wiring line and a second wiring line that are electrically coupled to each other. One of the first wiring line and the second wiring line is in an electrically floating state while the other is electrically coupled to a transistor.Type: ApplicationFiled: November 19, 2020Publication date: December 8, 2022Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Hiroki TOJINBARA
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Patent number: 11329078Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: GrantFiled: September 2, 2020Date of Patent: May 10, 2022Assignee: SONY CORPORATIONInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
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Publication number: 20200403015Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: ApplicationFiled: September 2, 2020Publication date: December 24, 2020Applicant: Sony CorporationInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
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Patent number: 10818722Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: GrantFiled: July 12, 2019Date of Patent: October 27, 2020Assignee: Sony CorporationInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
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Publication number: 20190341418Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: ApplicationFiled: July 12, 2019Publication date: November 7, 2019Applicant: Sony CorporationInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
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Patent number: 10367027Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: GrantFiled: October 5, 2017Date of Patent: July 30, 2019Assignee: Sony CorporationInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
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Patent number: 9960202Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: GrantFiled: December 6, 2016Date of Patent: May 1, 2018Assignee: Sony CorporationInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
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Publication number: 20180047776Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: ApplicationFiled: October 5, 2017Publication date: February 15, 2018Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
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Publication number: 20170084659Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: ApplicationFiled: December 6, 2016Publication date: March 23, 2017Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
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Patent number: 9548326Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: GrantFiled: January 12, 2016Date of Patent: January 17, 2017Assignee: Sony CorporationInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
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Publication number: 20160126273Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: ApplicationFiled: January 12, 2016Publication date: May 5, 2016Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
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Patent number: 9276032Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: GrantFiled: September 18, 2014Date of Patent: March 1, 2016Assignee: SONY CORPORATIONInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
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Patent number: RE50032Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.Type: GrantFiled: July 28, 2022Date of Patent: July 2, 2024Assignee: Sony Group CorporationInventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda