Patents by Inventor Hiroki TSUMA
Hiroki TSUMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12615823Abstract: A method of manufacturing a silicon carbide semiconductor device includes formation of an electrode and formation of a gate wiring. The electrode is formed to be electrically connected to a base layer and an impurity region included in a semiconductor substrate through a first contact hole. The gate wiring is formed to be electrically connected to a connection wiring through a second contact hole, and is made of material capable of deoxidizing an oxide film. The oxide film is removed by deoxidizing the oxide film formed on the connection wiring to remove the oxygen from the oxide film into the gate wiring through heating treatment for the gate wiring in the formation of the gate wiring or after the formation of the gate wiring.Type: GrantFiled: June 28, 2022Date of Patent: April 28, 2026Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies CorporationInventors: Hiroki Tsuma, Yohei Iwahashi, Masashi Uecha
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Publication number: 20250380448Abstract: The semiconductor device includes a semiconductor substrate partitioned into an active region, a peripheral high-breakdown-voltage region, and a boundary region disposed between the active region and the peripheral high-breakdown-voltage region. The semiconductor device further includes a main electrode, an insulating layer disposed in at least a portion of the boundary region and having an end portion facing the active region, a gate wiring disposed above the insulating layer, a gate electrode disposed in the active region, and a gate lead portion connecting the gate electrode and the gate wiring and extending above the end portion of the insulating layer. The boundary region includes a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type disposed above the first semiconductor layer. The second semiconductor layer has a contact portion in contact with the main electrode at a position outside the gate wiring.Type: ApplicationFiled: May 12, 2025Publication date: December 11, 2025Inventors: HIROKI TSUMA, TOSHIKI MII, MASATO NOBORIO, JUN SAITO
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Publication number: 20250336726Abstract: In a manufacturing method of a semiconductor device, a semiconductor wafer that is made of a semiconductor material harder than silicon and has a first surface and a second surface opposite to each other is prepared, a roughened layer is formed by grinding the second surface of the semiconductor wafer, a blade is pressed against the roughened layer to form a vertical crack in a surface layer of the semiconductor wafer, the roughened layer is removed after the vertical crack is formed, a rear surface electrode is formed on a rear surface of the semiconductor wafer on which the vertical crack is formed, and after the rear surface electrode is formed, the first surface of the semiconductor wafer is pressed and the semiconductor wafer is cleaved into multiple pieces with the vertical crack as a starting point.Type: ApplicationFiled: July 10, 2025Publication date: October 30, 2025Inventors: YUJI NAGUMO, MASASHI UECHA, HIROKI TSUMA, TERUAKI KUMAZAWA
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Patent number: 12424496Abstract: In a manufacturing method of a semiconductor device, a semiconductor wafer that is made of a semiconductor material harder than silicon and has a first surface and a second surface opposite to each other is prepared, a roughened layer is formed by grinding the second surface of the semiconductor wafer, a blade is pressed against the roughened layer to form a vertical crack in a surface layer of the semiconductor wafer, the roughened layer is removed after the vertical crack is formed, a rear surface electrode is formed on a rear surface of the semiconductor wafer on which the vertical crack is formed, and after the rear surface electrode is formed, the first surface of the semiconductor wafer is pressed and the semiconductor wafer is cleaved into multiple pieces with the vertical crack as a starting point.Type: GrantFiled: December 13, 2022Date of Patent: September 23, 2025Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies CorporationInventors: Yuji Nagumo, Masashi Uecha, Hiroki Tsuma, Teruaki Kumazawa
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Patent number: 12426329Abstract: A silicon carbide semiconductor device includes a silicon carbide semiconductor layer and a side silicide layer. The silicon carbide semiconductor layer includes a silicon carbide single crystal and has a main surface, a rear surface opposite to the main surface, and a side surface connecting the main surface and the rear surface and formed by a cleavage plane. The silicon carbide semiconductor layer further includes a modified layer. The modified layer forms a part of the side surface located close to the rear surface and has an atomic arrangement structure of silicon carbide different from an atomic arrangement structure of the silicon carbide single crystal. The side silicide layer includes a metal silicide that is a compound of a metal element and silicon. The side silicide layer is disposed on the side surface of the silicon carbide semiconductor layer and is adjacent to the modified layer.Type: GrantFiled: November 4, 2022Date of Patent: September 23, 2025Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies CorporationInventors: Hiroki Tsuma, Yuji Nagumo, Masashi Uecha, Teruaki Kumazawa
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Patent number: 12154963Abstract: An aluminum alloy film includes an Al—Si—Mg alloy film containing at least 0.9% by weight to 1.1% by weight of Si and 0.1% by weight to 2.3% by weight of Mg, and the Al—Si—Mg alloy film contains Mg silicide crystals in Al crystals. A semiconductor device includes multiple gate trench structures, an interlayer insulating film covering the trench gate structures, an electrode film covering the interlayer insulating film, an insulating layer and a conductive layer covering the electrode film. The electrode film includes the Al—Si—Mg alloy film.Type: GrantFiled: June 2, 2022Date of Patent: November 26, 2024Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies CorporationInventor: Hiroki Tsuma
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Publication number: 20230197519Abstract: In a manufacturing method of a semiconductor device, a semiconductor wafer that is made of a semiconductor material harder than silicon and has a first surface and a second surface opposite to each other is prepared, a roughened layer is formed by grinding the second surface of the semiconductor wafer, a blade is pressed against the roughened layer to form a vertical crack in a surface layer of the semiconductor wafer, the roughened layer is removed after the vertical crack is formed, a rear surface electrode is formed on a rear surface of the semiconductor wafer on which the vertical crack is formed, and after the rear surface electrode is formed, the first surface of the semiconductor wafer is pressed and the semiconductor wafer is cleaved into multiple pieces with the vertical crack as a starting point.Type: ApplicationFiled: December 13, 2022Publication date: June 22, 2023Inventors: YUJI NAGUMO, MASASHI UECHA, HIROKI TSUMA, TERUAKI KUMAZAWA
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Publication number: 20230178497Abstract: A semiconductor device includes a semiconductor substrate, an end region, and an active region. The end region is located above the semiconductor substrate, has a frame shape, and has been brought into contact with a blade in a scribing process. The active region is surrounded by the end region and is configured to serve as a path of a main current. The end region has a stress relaxation film on an outermost surface of the end region.Type: ApplicationFiled: November 15, 2022Publication date: June 8, 2023Inventors: Masashi UECHA, Yuji NAGUMO, Hiroki TSUMA, Teruaki KUMAZAWA
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Publication number: 20230154987Abstract: A silicon carbide semiconductor device includes a silicon carbide semiconductor layer and a side silicide layer. The silicon carbide semiconductor layer includes a silicon carbide single crystal and has a main surface, a rear surface opposite to the main surface, and a side surface connecting the main surface and the rear surface and formed by a cleavage plane. The silicon carbide semiconductor layer further includes a modified layer. The modified layer forms a part of the side surface located close to the rear surface and has an atomic arrangement structure of silicon carbide different from an atomic arrangement structure of the silicon carbide single crystal. The side silicide layer includes a metal silicide that is a compound of a metal element and silicon. The side silicide layer is disposed on the side surface of the silicon carbide semiconductor layer and is adjacent to the modified layer.Type: ApplicationFiled: November 4, 2022Publication date: May 18, 2023Inventors: HIROKI TSUMA, YUJI NAGUMO, MASASHI UECHA, TERUAKI KUMAZAWA
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Publication number: 20230009078Abstract: A method of manufacturing a silicon carbide semiconductor device includes formation of an electrode and formation of a gate wiring. The electrode is formed to be electrically connected to a base layer and an impurity region included in a semiconductor substrate through a first contact hole. The gate wiring is formed to be electrically connected to a connection wiring through a second contact hole, and is made of material capable of deoxidizing an oxide film. The oxide film is removed by deoxidizing the oxide film formed on the connection wiring to remove the oxygen from the oxide film into the gate wiring through heating treatment for the gate wiring in the formation of the gate wiring or after the formation of the gate wiring.Type: ApplicationFiled: June 28, 2022Publication date: January 12, 2023Inventors: Hiroki TSUMA, Yohei IWAHASHI, Masashi UECHA
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Publication number: 20220399455Abstract: An aluminum alloy film includes an Al—Si—Mg alloy film containing at least 0.9% by weight to 1.1% by weight of Si and 0.1% by weight to 2.3% by weight of Mg, and the Al—Si—Mg alloy film contains Mg silicide crystals in Al crystals. A semiconductor device includes multiple gate trench structures, an interlayer insulating film covering the trench gate structures, an electrode film covering the interlayer insulating film, an insulating layer and a conductive layer covering the electrode film. The electrode film includes the Al—Si—Mg alloy film.Type: ApplicationFiled: June 2, 2022Publication date: December 15, 2022Inventor: HIROKI TSUMA
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Patent number: 10490638Abstract: A semiconductor device may include: a semiconductor substrate; a surface electrode covering a surface of the semiconductor substrate; an insulating protection film covering a part of a surface of the surface electrode; and a solder-bonding metal film, the solder-bonding metal film covering a range spreading from a surface of the insulating protection film to the surface of the surface electrode, wherein the surface electrode may include: a first metal film provided on the semiconductor substrate; a second metal film being in contact with a surface of the first metal film, and having tensile strength higher than tensile strength of the first metal film; and a third metal film being in contact with a surface of the second metal film, and having tensile strength which is lower than the tensile strength of the second metal film and is higher than the tensile strength of the first metal film.Type: GrantFiled: January 23, 2018Date of Patent: November 26, 2019Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATIONInventors: Takashi Kuno, Hiroki Tsuma, Satoshi Kuwano, Akitaka Soeno, Toshitaka Kanemaru, Kenta Hashimoto, Noriyuki Kakimoto, Shuji Yoneda
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Patent number: 10115798Abstract: A semiconductor device is provided with: a semiconductor substrate; a first electrode disposed on a surface of the semiconductor device and configured to be soldered to a conductive member; and a second electrode disposed on the surface of the semiconductor device and configured to be wire-bonded to a conductive member. The first electrode includes first, second and third metal layers. The second metal layer is located between the first and third metal layers. A metallic material of the second metal layer is greater in tensile strength than a metallic material of each one of the first metal layer and the third metal layer. The second electrode includes a layer made of a same metallic material as one of the first metal layer and the third metal layer, and does not include any layers made of a same metallic material as the second metal layer.Type: GrantFiled: January 30, 2018Date of Patent: October 30, 2018Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Naoki Akiyama, Hiroki Tsuma, Takashi Kuno, Toshitaka Kanemaru, Kenta Hashimoto
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Publication number: 20180233571Abstract: A semiconductor device is provided with: a semiconductor substrate; a first electrode disposed on a surface of the semiconductor device and configured to be soldered to a conductive member; and a second electrode disposed on the surface of the semiconductor device and configured to be wire-bonded to a conductive member. The first electrode includes first, second and third metal layers. The second metal layer is located between the first and third metal layers. A metallic material of the second metal layer is greater in tensile strength than a metallic material of each one of the first metal layer and the third metal layer. The second electrode includes a layer made of a same metallic material as one of the first metal layer and the third metal layer, and does not include any layers made of a same metallic material as the second metal layer.Type: ApplicationFiled: January 30, 2018Publication date: August 16, 2018Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Naoki AKIYAMA, Hiroki TSUMA, Takashi KUNO, Toshitaka KANEMARU, Kenta HASHIMOTO
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Publication number: 20180212028Abstract: A semiconductor device may include: a semiconductor substrate; a surface electrode covering a surface of the semiconductor substrate; an insulating protection film covering a part of a surface of the surface electrode; and a solder-bonding metal film, the solder-bonding metal film covering a range spreading from a surface of the insulating protection film to the surface of the surface electrode, wherein the surface electrode may include: a first metal film provided on the semiconductor substrate; a second metal film being in contact with a surface of the first metal film, and having tensile strength higher than tensile strength of the first metal film; and a third metal film being in contact with a surface of the second metal film, and having tensile strength which is lower than the tensile strength of the second metal film and is higher than the tensile strength of the first metal film.Type: ApplicationFiled: January 23, 2018Publication date: July 26, 2018Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATIONInventors: Takashi KUNO, Hiroki TSUMA, Satoshi KUWANO, Akitaka SOENO, Toshitaka KANEMARU, Kenta HASHIMOTO, Noriyuki KAKIMOTO, Shuji YONEDA