Patents by Inventor Hiroki Yanagisawa

Hiroki Yanagisawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120203815
    Abstract: A matrix calculation method and system for calculating funny matrix multiplication (FMM) of a matrix A and a matrix B, including: sequentially calculating a permutation of indices {ai} in which values are arranged in a non-decreasing order with respect to each i-th row where i=1 to the number of rows of the matrix A; storing a value, which is greater than expected as a value of a matrix, for C[i, j] with respect to each j-th column where j=1 to the number of columns of the matrix A in the i-th row; sequentially calculating a permutation of indices {bj} in which values are arranged in a non-decreasing order with respect to each j-th column where j=1 to the number of columns of the matrix B; and setting the values of C[i, j], which are i and j components of the matrix C.
    Type: Application
    Filed: February 1, 2012
    Publication date: August 9, 2012
    Applicant: International Business Machines Corporation
    Inventor: Hiroki Yanagisawa
  • Patent number: 8214527
    Abstract: A plurality of landmarks selected from a source weighed graph on which a path search is performed; and the shortest path lengths between landmarks, and the shortest path lengths from vertices to landmarks adjacent to the respective vertices are calculated, and are stored in a memory device so as to be later referable. Routines for calculating upper and lower limits of the shortest path length corresponding to two vertices v and w are prepared by using expressions derived from quadrangle inequalities formed of the two vertices v and w as well as two landmarks adjacent to the respective vertices v and w. In response to a call from an A* search program, these routines return the upper limit or the lower limit of the shortest path length corresponding to v and w by referring to the shortest path lengths between landmarks, and the shortest path lengths from vertices to landmarks adjacent to the respective vertices, which have been previously stored in the memory device.
    Type: Grant
    Filed: December 22, 2007
    Date of Patent: July 3, 2012
    Assignee: International Business Machines Corporation
    Inventors: Tomokazu Imamura, Hiroki Yanagisawa
  • Patent number: 8095652
    Abstract: An analysis system, information processing apparatus, activity analysis method, and program for analyzing activities of an information source on a network. The system and apparatus include an attribute extraction block for extracting, an information propagation graph acquisition block for searching action history data, and a characteristic user calculation block for calculating an amount characteristic. The method and program product include the steps of extracting an information characteristic value, searching action history data, registering the information, calculating an amount characteristic, and integrating the amount characteristic.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: January 10, 2012
    Assignee: International Business Machines Corporation
    Inventors: Raymond Harry Putra Rudy, Akiko Suzuki, Hiroki Yanagisawa, Issei Yoshida
  • Publication number: 20100332436
    Abstract: A method and system for solving shortest paths from multiple sources to multiple destinations faster. A method of solving the multiple-pairs shortest path problem is provided using processing by a computer having storage means. The method includes the steps of: (A) reading graph data S on multiple vertices as search starting points from a storage area of the computer; (B) reading graph data T on multiple vertices as search targets from the storage area of the computer; (C) selecting k vertices s1, s2, . . . , sk from the graph data S; (D) deleting the k vertices from the graph data S; (E) finding and storing, in the storage area, shortest path lengths from each of the selected k vertices to the graph data T; and (F) repeating the steps from (C) to (E) until the graph data S becomes empty.
    Type: Application
    Filed: June 16, 2010
    Publication date: December 30, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Hiroki Yanagisawa
  • Publication number: 20090300150
    Abstract: An information processor and method for classifying user attributes of a plurality of nodes connected to a network. The information processor includes: an action history obtaining unit for generating a spammer-reporting action history set; a related node obtaining unit for generating a node set and a link set related to the spammer-reporting actions; an undirected graph generation unit for generating an undirected graph from the node set and the link set; and a max-cut computation unit classifying the nodes constituting the undirected graph into two exclusive sets that do not commonly include any element so as to maximize an indicator value defined by links bridging the two sets.
    Type: Application
    Filed: May 27, 2009
    Publication date: December 3, 2009
    Inventors: Raymond Harry Putra Rudy, Akiko Suzuki, Hiroki Yanagisawa
  • Publication number: 20090222557
    Abstract: An analysis system, information processing apparatus, activity analysis method, and program for analyzing activities of an information source on a network. The system and apparatus include an attribute extraction block for extracting, an information propagation graph acquisition block for searching action history data, and a characteristic user calculation block for calculating an amount characteristic. The method and program product include the steps of extracting an information characteristic value, searching action history data, registering the information, calculating an amount characteristic, and integrating the amount characteristic.
    Type: Application
    Filed: February 27, 2009
    Publication date: September 3, 2009
    Inventors: Raymond Harry Putra Rudy, Akiko Suzuki, Hiroki Yanagisawa, Issei Yoshida
  • Publication number: 20080155119
    Abstract: A plurality of landmarks selected from a source weighed graph on which a path search is performed; and the shortest path lengths between landmarks, and the shortest path lengths from vertices to landmarks adjacent to the respective vertices are calculated, and are stored in a memory device so as to be later referable. Routines for calculating upper and lower limits of the shortest path length corresponding to two vertices v and w are prepared by using expressions derived from quadrangle inequalities formed of the two vertices v and w as well as two landmarks adjacent to the respective vertices v and w. In response to a call from an A* search program, these routines return the upper limit or the lower limit of the shortest path length corresponding to v and w by referring to the shortest path lengths between landmarks, and the shortest path lengths from vertices to landmarks adjacent to the respective vertices, which have been previously stored in the memory device.
    Type: Application
    Filed: December 22, 2007
    Publication date: June 26, 2008
    Inventors: Tomokazu Imamura, Hiroki Yanagisawa
  • Patent number: 6838488
    Abstract: A method for producing expanded polypropylene resin particles wherein polypropylene resin particles impregnated with a physical blowing agent are heated along with an aqueous medium and a dispersant and are released and expanded at reduced pressure from the interior of a pressure-tight vessel, wherein the aforementioned aqueous medium has an electrical conductivity of from not less than 0.00 ms/m to not more than 20.00 mS/m. The resulting particles obtained are without inconsistencies caused by differences in the amount of dispersant adhering to the particles or the amount of dispersant added to prevent the particles from fusing together during the heat treatment step of the method.
    Type: Grant
    Filed: June 7, 2002
    Date of Patent: January 4, 2005
    Assignee: JSP Corporation
    Inventors: Hidehiro Sasaki, Kazuya Ogiyama, Akinobu Hira, Keiichi Hashimoto, Hiroki Yanagisawa, Hisao Tokoro
  • Publication number: 20030034580
    Abstract: A method for producing expanded polypropylene resin particles wherein polypropylene resin particles impregnated with a physical blowing agent are heated along with an aqueous medium and a dispersant and are released and expanded at reduced pressure from the interior of a pressure-tight vessel, wherein the aforementioned aqueous medium has an electrical conductivity of from not less than 0.00 ms/m to not more than 20.00 mS/m. The resulting particles obtained are without inconsistencies caused by differences in the amount of dispersant adhering to the particles or the amount of dispersant added to prevent the particles from fusing together during the heat treatment step of the method.
    Type: Application
    Filed: June 7, 2002
    Publication date: February 20, 2003
    Applicant: JSP CORPORATION
    Inventors: Hidehiro Sasaki, Kazuya Ogiyama, Akinobu Hira, Keiichi Hashimoto, Hiroki Yanagisawa, Hisao Tokoro
  • Patent number: 6462325
    Abstract: An optical output shutoff detecting circuit of the present invention includes a flip-flop. The flip-flop has a D terminal to which a signal representative of a result of comparison between the output level of an optical signal output from a laser diode and a reference signal is input, and a C terminal to which a signal produced by delaying a data signal is input. The output signal of the flip-flop is used to detect the output level of the optical signal.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: October 8, 2002
    Assignee: NEC Corporation
    Inventor: Hiroki Yanagisawa
  • Patent number: 6191879
    Abstract: An optical receiver having a photodiode and a preamplifier includes a charge controller which charges a capacitor depending on an received voltage signal at each burst timing of the burst-mode signal and then discharges the capacitor with a predetermined time constant to produce an amplitude-varying offset component. The current signal of the photodiode is controlled so that the amplitude-varying offset component is canceled out.
    Type: Grant
    Filed: July 23, 1998
    Date of Patent: February 20, 2001
    Assignee: NEC Corporation
    Inventor: Hiroki Yanagisawa
  • Patent number: 5736844
    Abstract: A voltage controlled oscillator includes transistors Q1, Q2 and Q3 constituting a differential amplifier circuit. The differential amplifier circuit performs switching operations in accordance with input pulse signals. A current amplitude determined by the emitter current of the transistor Q3 drives a laser diode. An operational amplifier 6 has an output connected to the base of the transistor Q3 via an emitter follower Q7. A control terminal 7 is connected to the non-inverting input of the operational amplifier 6. A voltage applied to the control terminal 7 controls the base potential of the transistor Q3, thereby changing the emitter current of the transistor Q3. The current for driving the laser diode is controlled by the voltage signal via the emitter follower. Therefore, the ON/OFF control of the drive current can be executed surely and stably without being influenced by noise, wiring pattern capacity or the like and even from the outside of the laser diode drive circuit.
    Type: Grant
    Filed: July 29, 1996
    Date of Patent: April 7, 1998
    Assignee: NEC Corporation
    Inventor: Hiroki Yanagisawa