Patents by Inventor Hiroki Yoshine

Hiroki Yoshine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4503546
    Abstract: A two-level alternate mark inversion signal transmission system wherein binary pulses of "1" and "0" levels are converted into a pulse signal in which one coded information value has its polarity inverted at a period T and the other has its polarity reversed at a period T/2, and the converted signal is transmitted. In order to facilitate an automatic gain control operation and the proper and reliable extraction of a timing signal on the receiving side of the system even when the zero binary pulses have successively arisen in the signal processed on the transmitting side, the alternate mark inversion signal is converted into a specified code (zero substitution) signal when the zero binary pulses have succeeded one another for a predetermined number of times, while on the receiving side, a received signal is subjected to duobinary shaping, whereupon the zero substitution part is detected for removal by utilizing the rules of the zero substitution process and the alternate mark inversion signal.
    Type: Grant
    Filed: March 1, 1983
    Date of Patent: March 5, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Hiroki Yoshine, Yoshitaka Takasaki, Yasushi Takahashi, Mitsuo Yamada, Katsuyuki Nagano
  • Patent number: 4330856
    Abstract: In a digital signal transmission system wherein input digital signals having an arbitrary bit rate are converted into digital signals of a bit rate higher than that of the input digital signals and then transmitted through a signal format converter; in order to realize the signal format conversion in real time the signal format converter is constructed of a buffer circuit of small capacity, a circuit which writes the input signals into the buffer circuit at the bit rate of said input signals and which reads out the written signals at the bit rate of a transmission line, a circuit which distinguishes the signals to-be-read as a mark, space and empty, and an encoding circuit which converts the mark, space and empty into pulse signals discernible with the unit being a time slot of the transmission line or integral times the time slot, in dependence of the levels of pulses or the numbers of successive pulses (run length).
    Type: Grant
    Filed: February 6, 1980
    Date of Patent: May 18, 1982
    Assignee: Hitachi, Ltd.
    Inventors: Yoshitaka Takasaki, Hiroki Yoshine