Abstract: A differential amplifier of the present invention comprises transistors where to each of which one of two inputs to said differential amplifier is provided; current mirror circuits where each of which delivers one of the outputs of the differential amplifier to the load side; and cut-off prevention units where each of which is connected to the connecting point of a transistor to which a monitor current of one of the current mirror circuits flows, and one of the transistors to which the inputs are provided, and applies a current for preventing cutting off the transistor to which the monitor current flows, when the input to the transistor to which the input is provided is L.

Abstract: A differential amplifier of the present invention comprises transistors where to each of which one of two inputs to said differential amplifier is provided; current mirror circuits where each of which delivers one of the outputs of the differential amplifier to the load side; and cut-off prevention units where each of which is connected to the connecting point of a transistor to which a monitor current of one of the current mirror circuits flows, and one of the transistors to which the inputs are provided, and applies a current for preventing cutting off the transistor to which the monitor current flows, when the input to the transistor to which the input is provided is L.

Abstract: The differential amplifier of the present invention has a current source connected between a grounding wire and a terminal which can be the output point of the differential amplifier among the terminals of each transistor which constitutes the differential amplifier and to which one of two inputs to the differential amplifier is given, or a circuit element connected between the terminals which can be the output points of the differential amplifier, or two transistors which are connected to each of the terminals which can be the output points of the differential amplifier and one of which turns off when the other is on, and one of which turns on when the other is off, and the current source is connected between the two transistors and the grounding wire.

Abstract: In a differential output signal circuit suitable for restraining voltage overshooting/undershooting at differential output terminals due to lags in input signals and realizing stable and fast switching of differential input signals, a first differential pair of PMOS. transistors connected to a first current source and a second differential pair of NMOS transistors connected to a second current source are mutually connected at the differential output terminals, and a capacitor is connected between the connection nodes of the respective differential pairs and current sources. A transitional current path of the capacitor restrains voltage variations during differential input signal switching.

Abstract: In a differential output signal circuit suitable for restraining voltage overshooting/undershooting at differential output terminals due to lags in input signals and realizing stable and fast switching of differential input signals, a first differential pair of PMOS. transistors connected to a first current source and a second differential pair of NMOS transistors connected to a second current source are mutually connected at the differential output terminals, and a capacitor is connected between the connection nodes of the respective differential pairs and current sources. A transitional current path of the capacitor restrains voltage variations during differential input signal switching.

Abstract: In a differential output signal circuit suitable for restraining voltage overshooting/undershooting at differential output terminals due to lags in input signals and realizing stable and fast switching of differential input signals, a first differential pair of PMOS transistors connected to a first current source and a second differential pair of NMOS transistors connected to a second current source are mutually connected at the differential output terminals, and a capacitor is connected between the connection nodes of the respective differential pairs and current sources. A transitional current path of the capacitor restrains voltage variations during differential input signal switching.

Abstract: A servo signal processing apparatus for processing a servo signal corresponding to servo information from a servo area on a recording medium for controlling a head. The servo area includes a servo mark area for storing a servo mark indicative of a head of the servo area, a gray mark area for storing a gray mark indicative of a head of information for position control for the head, and a gray code area for storing information. An A-D converter converts the servo signal to digital data. A digital filter filters the converted data based on a sampling clock, and outputs the filtered digital data. A servo mark detector detects a servo mark based on a continuity of a first predetermined logical value. A gray code decoder detects a gray code based on a continuity of a predetermined logical value. The gray code decoder decodes information stored in a gray code area following the detected gray mark.

Abstract: A servo signal processing apparatus for processing a servo signal corresponding to servo information from a servo area on a recording medium for controlling a head. The servo area includes a servo mark area for storing a servo mark indicative of a head of the servo area, a gray mark area for storing a gray mark indicative of a head of information for position control for the head, and a gray code area for storing information. An A-D converter converts the servo signal to digital data. A digital filter filters the converted data based on a sampling clock, and outputs the filtered digital data. A servo mark detector detects a servo mark based on a continuity of a first predetermined logical value. A gray code decoder detects a gray code based on a continuity of a predetermined logical value. The gray code decoder decodes information stored in a gray code area following the detected gray mark.

Abstract: In a differential output signal circuit suitable for restraining voltage overshooting/undershooting at differential output terminals due to lags in input signals and realizing stable and fast switching of differential input signals, a first differential pair of PMOS transistors connected to a first current source and a second differential pair of NMOS transistors connected to a second current source are mutually connected at the differential output terminals, and a capacitor is connected between the connection nodes of the respective differential pairs and current sources. A transitional current path of the capacitor restrains voltage variations during differential input signal switching.

Abstract: A signal processing apparatus for reading and writing information to a storage medium includes a power supply control circuit that selectively inhibits and enables power to individual circuits of the signal processing apparatus in order to achieve maximum power conservation. The signal processing apparatus looks ahead to determine a next operation to be performed and, using either read or write information of the next operation, along with information concerning how long it takes to power up individual circuits, determines the optimal time to switch power on to the individual circuits. Power is then supplied to the individual circuits of the signal processing apparatus only when it is required by the individual circuits.

Abstract: A servo signal processing apparatus for processing a servo signal corresponding to servo information from a servo area on a recording medium for controlling a head. The servo area includes a servo mark area for storing a servo mark indicative of a head of the servo area, a gray mark area for storing a gray mark indicative of a head of information for position control for the head, and a gray code area for storing information. An A-D converter converts the servo signal to digital data. A digital filter filters the converted data based on a sampling clock, and outputs the filtered digital data. A servo mark detector detects a servo mark based on a continuity of a first predetermined logical value. A gray code decoder detects a gray code based on a continuity of a predetermined logical value. The gray code decoder decodes information stored in a gray code area following the detected gray mark.

Abstract: In an initial core constituted by various kinds of fuel assemblies having a different average enrichment of uranium 235 four fuel assemblies having the lowest average enrichment constitute a square shaped cell. Three fuel assemblies having the highest average enrichment constitute an L-shaped cell, and the L-shaped cell is arranged at corners of the square shaped cells, whereby each assembly of the L-shaped cell adjoins a square shaped cell. The ratio of the number of assemblies of the L-shaped cell to the total number of fuel assemblies in the core is 10% or more.