Patents by Inventor Hiroko Kaneko

Hiroko Kaneko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8163556
    Abstract: The invention provides a substrate suitable for cell culture observation and a method of observation using the same. Crystalline carbon such as a graphite powder is mixed into a thermosetting resin such as a furan resin, and the mixture is molded in the shape of a sheet and carbonized to produce a carbon substrate; then, a cell is made to adhere to the carbon substrate, and the cell is caused to proliferate on the carbon substrate and observed using a microscope.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: April 24, 2012
    Assignees: Mitsubishi Pencil Co., Ltd., Kaora Katoh, Hiroko Kaneko
    Inventors: Yoshihisa Suda, Kunitaka Yamada, Hiroko Kaneko, Kaoru Katoh, Harumasa Okamoto
  • Patent number: 7436294
    Abstract: An apparatus, which is for disaster prevention installed in a facility, includes a radio-frequency identification tag that stores at least one of a first data and a second data. The first data is related to the disaster prevention, and is transmitted by wireless communication. The second data is related to the disaster prevention, and is received by wireless communication.
    Type: Grant
    Filed: August 1, 2005
    Date of Patent: October 14, 2008
    Assignee: Fujitsu Limited
    Inventors: Susumu Saga, Yasuyuki Kawaida, Hiroko Kaneko
  • Patent number: 7264756
    Abstract: The invention provides at a relatively low cost a carbon substrate that is formed from an opaque material and that has an extremely flat surface so that optical measurements can be made on the substrate. Graphite powder with a particle size of 10 ?m or less is mixed in a thermosetting resin such as a furan resin, and the mixture is molded into a sheet and calcined at 1400° C. in an inert atmosphere to produce a carbon substrate whose surface is then ground flat.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: September 4, 2007
    Assignee: Mitsubishi Pencil Co., Ltd.
    Inventors: Yoshihisa Suda, Atsunori Satake, Kunitaka Yamada, Hiroko Kaneko, Kaoru Kato
  • Publication number: 20060226970
    Abstract: An apparatus, which is for disaster prevention installed in a facility, includes a radio-frequency identification tag that stores at least one of a first data and a second data. The first data is related to the disaster prevention, and is transmitted by wireless communication. The second data is related to the disaster prevention, and is received by wireless communication.
    Type: Application
    Filed: August 1, 2005
    Publication date: October 12, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Susumu Saga, Yasuyuki Kawaida, Hiroko Kaneko
  • Publication number: 20060194312
    Abstract: The invention provides a substrate suitable for cell culture observation and a method of observation using the same. Crystalline carbon such as a graphite powder is mixed into a thermosetting resin such as a furan resin, and the mixture is molded in the shape of a sheet and carbonized to produce a carbon substrate; then, a cell is made to adhere to the carbon substrate, and the cell is caused to proliferate on the carbon substrate and observed using a microscope.
    Type: Application
    Filed: February 21, 2006
    Publication date: August 31, 2006
    Inventors: Yoshihisa SUDA, Kunitaka YAMADA, Hiroko KANEKO, Kaoru KATOH, Harumasa OKAMOTO
  • Publication number: 20050214164
    Abstract: The invention provides at a relatively low cost a carbon substrate that is formed from an opaque material and that has an extremely flat surface so that optical measurements can be made on the substrate. Graphite powder with a particle size of 10 ?m or less is mixed in a thermosetting resin such as a furan resin, and the mixture is molded into a sheet and calcined at 1400° C. in an inert atmosphere to produce a carbon substrate whose surface is then ground flat.
    Type: Application
    Filed: October 25, 2004
    Publication date: September 29, 2005
    Inventors: Yoshihisa Suda, Atsunori Satake, Kunitaka Yamada, Hiroko Kaneko, Kaoru Kato
  • Patent number: 6838175
    Abstract: A carbon microrod that holds a fine object by chemically adsorbing the object on the surface to make a dynamic measurement possible. An organic substance that leaves, after firing, glassy carbon that hardly becomes graphite, such as a chlorinated vinyl chloride resin, is mixed with a fine graphite powder having an average particle size of 1 ?m, and the mixture is extrusion molded with a die having a diameter of 50 ?m; the molded article is fired to give a carbon microrod comprising glassy carbon and crystalline carbon.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: January 4, 2005
    Assignees: National Institute of Advanced Industrial Science and Technology, Tsukuba Materials Information Laboratory, Ltd., Mitsubishi Pencil Co., Ltd.
    Inventors: Kaoru Katoh, Masahiro Yamada, Hiroko Kaneko, Yoshihisa Suda
  • Publication number: 20040155289
    Abstract: A method of manufacturing a semiconductor integrated circuit device having a switching MISFET and a capacitor element formed over a semiconductor substrate, such as a DRAM, is disclosed. The dielectric film of the capacitor element is formed to be co-extensive with the capacitor electrode layer over it. The upper electrode of the capacitor element is formed to be larger than the lower electrode.
    Type: Application
    Filed: February 10, 2004
    Publication date: August 12, 2004
    Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
  • Patent number: 6737318
    Abstract: A method of manufacturing a semiconductor integrated circuit device having a switching MISFET and a capacitor element formed over a semiconductor substrate, such as a DRAM, is disclosed. The dielectric film of the capacitor element is formed to be co-extensive with the capacitor electrode layer over it. The upper electrode of the capacitor element is formed to be larger than the lower electrode.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: May 18, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
  • Publication number: 20020127793
    Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, such as a DRAM, is disclosed. In a first aspect of the present invention, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In a second aspect, the Y-select signal line overlaps the lower electrode layer of the capacitor element. In a third aspect, a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected, is formed by diffusion of an impurity for a channel stopper region. In a fourth aspect, the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it.
    Type: Application
    Filed: December 3, 2001
    Publication date: September 12, 2002
    Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
  • Publication number: 20020102202
    Abstract: A carbon microrod that holds a fine object by chemically adsorbing the object on the surface to make a dynamic measurement possible. An organic substance that leaves, after firing, glassy carbon that hardly becomes graphite, such as a chlorinated vinyl chloride resin, is mixed with a fine graphite powder having an average particle size of 1 &mgr;m, and the mixture is extrusion molded with a die having a diameter of 50 &mgr;m; the molded article is fired to give a carbon microrod comprising glassy carbon and crystalline carbon.
    Type: Application
    Filed: January 30, 2002
    Publication date: August 1, 2002
    Applicant: National Institute of Advanced Industrial Science and Technology
    Inventors: Kaoru Katoh, Masahiro Yamada, Hiroko Kaneko, Yoshihisa Suda
  • Publication number: 20020028574
    Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, such as a DRAM, is disclosed. In a first aspect of the present invention, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In a second aspect, the Y-select signal line overlaps the lower electrode layer of the capacitor element. In a third aspect, a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected,, is formed by diffusion of an impurity for a channel stopper region. In a fourth aspect, the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it.
    Type: Application
    Filed: July 27, 2001
    Publication date: March 7, 2002
    Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
  • Patent number: 6281071
    Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, such as a DRAM, is disclosed. In a first aspect of the present invention, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In a second aspect, the Y-select signal line overlaps the lower electrode layer of the capacitor element. In a third aspect, a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected, is formed by diffusion of an impurity for a channel stopper region. In a fourth aspect, the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it.
    Type: Grant
    Filed: May 25, 1999
    Date of Patent: August 28, 2001
    Assignee: Hiatchi, Ltd.
    Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
  • Patent number: 5930624
    Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, is disclosed. In a first aspect, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry.
    Type: Grant
    Filed: January 26, 1998
    Date of Patent: July 27, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
  • Patent number: 5917211
    Abstract: A semiconductor integrated circuit comprising first n-channel MISFETs constituting the memory cells of a storage system, second n-channel MISFETs constituting the peripheral circuits of the storage system, and third n-channel MISFETs constituting the output circuit among the peripheral circuits. The respective threshold voltages of the first n-channel MISFETs, the second n-channel MISFETs and the third n-channel MISFETs are decreased in that order when the respective gate lengths of those MISFETs are substantially the same.
    Type: Grant
    Filed: November 25, 1997
    Date of Patent: June 29, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Jun Murata, Yoshitaka Tadaki, Hiroko Kaneko, Toshihiro Sekiguchi, Hiroyuki Uchiyama, Hisashi Nakamura, Toshio Maeda, Osamu Kasahara, Hiromichi Enami, Atsushi Ogishima, Masaki Nagao, Michimasa Funabashi, Yasuo Kiguchi, Masayuki Kojima, Atsuyoshi Koike, Hiroyuki Miyazawa, Masato Sadaoka, Kazuya Kadota, Tadashi Chikahara, Kazuo Nojiri, Yutaka Kobayashi
  • Patent number: 5753550
    Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, is disclosed. In a first aspect, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry.
    Type: Grant
    Filed: March 25, 1996
    Date of Patent: May 19, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
  • Patent number: 5734188
    Abstract: A semiconductor integrated circuit comprising first n-channel MISFETs constituting the memory cells of a storage system, second n-channel MISFETs constituting the peripheral circuits of the storage system, and third n-channel MISFETs constituting the output circuit among the peripheral circuits. The respective threshold voltages of the first n-channel MISFETs, the second n-channel MISFETs and the third n-channel MISFETs are decreased in that order when the respective gate lengths of those MISFETs are substantially the same.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: March 31, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Jun Murata, Yoshitaka Tadaki, Hiroko Kaneko, Toshihiro Sekiguchi, Hiroyuki Uchiyama, Hisashi Nakamura, Toshio Maeda, Osamu Kasahara, Hiromichi Enami, Atsushi Ogishima, Masaki Nagao, Michimasa Funabashi, Yasuo Kiguchi, Masayuki Kojima, Atsuyoshi Koike, Hiroyuki Miyazawa, Masato Sadaoka, Kazuya Kadota, Tadashi Chikahara, Kazuo Nojiri, Yutaka Kobayashi
  • Patent number: 5704118
    Abstract: A process for producing a carbon sensor for measuring a composition, includes (a) providing first and second carbon electrodes each comprised of a bundle of linear, thin carbon members; (b) surrounding the first carbon electrode by dipping the first carbon electrode in a solution comprised of a reactive substance which reacts chemically with the composition to be measured; (c) disposing the first carbon electrode and the solution in a cylindrical ion permeable membrane to hold the solution in the first carbon electrode as well as between the first carbon electrode and the cylindrical ion permeable membrane; (d) positioning the cylindrical ion permeable membrane including the first carbon electrode and the solution in an insulating tubular member; and (e) disposing the second carbon electrode between the insulating tubular member and the cylindrical ion permeable membrane.
    Type: Grant
    Filed: March 28, 1995
    Date of Patent: January 6, 1998
    Assignee: Agency of Industrial Science and Technology
    Inventors: Hiroko Kaneko, Akira Negishi, Ken Nozaki
  • Patent number: 5504029
    Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, is disclosed. The impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. The Y-select signal line overlaps the lower electrode layer of the capacitor element. A potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected, is formed by diffusion of an impurity for a channel stopper region. The dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it. The capacitor dielectric film is a silicon nitride film having a silicon oxide layer thereon, the silicon oxide layer being formed by oxidizing a surface layer of the silicon nitride under high pressure.
    Type: Grant
    Filed: June 6, 1994
    Date of Patent: April 2, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
  • Patent number: 5503728
    Abstract: A carbon electrode is dipped in a solution containing a reactive substance, and the carbon electrode impregnated with the solution is covered with an insulating tubular member; or a solution containing a reactant is poured into an insulating tube, and a carbon electrode is inserted into the tube; whereby the reactant is made coexistent in the periphery of the carbon electrode. Alternatively, a reactive substance such as an active enzyme and graphite particles or activated carbon particles are mixed with a liquid and dispersed therein to prepare a thoroughly wetted paste. The paste is introduced by means of an extruding mechanism such as a syringe into an insulating tubular member in which a bundle of many thin carbon rods as a lead is inserted. Thus, a carbon sensor electrode is produced. Alternatively, a first carbon electrode that has been dipped in an active enzyme or an enzyme-like reactive substance solution is disposed in a wet condition in a cylindrical ion permeable membrane.
    Type: Grant
    Filed: October 4, 1994
    Date of Patent: April 2, 1996
    Assignee: Agency of Industrial Science and Technology
    Inventors: Hiroko Kaneko, Akira Negishi, Ken Nozaki