Patents by Inventor Hiroko Kinoshita

Hiroko Kinoshita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Signal detection method, frequency detection method, power consumption control method, signal detecting device, frequency detecting device, power consumption control device and electronic apparatus
    Patent number: 7373531
    Abstract: A power consumption control device for detecting output of a pulse signal from an output terminal of an oscillator as an operation monitoring target and outputting a power consumption reduction signal when the pulse signal is not detected in a predetermined period of time, includes a p-type transistor and an n-type transistor which are connected in series and have a gate to which the output terminal is connected, and detecting means for detecting a through current flowing through the p-type transistor and n-type transistor, and outputs a power consumption reduction signal when the through current is not detected in a predetermined period of time.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: May 13, 2008
    Assignee: Fujitsu Limited
    Inventors: Katsuya Shimizu, Hiroko Kinoshita
  • Signal detection method, frequency detection method, power consumption control method, signal detecting device, frequency detecting device, power consumption control device and electronic apparatus
    Publication number: 20060156044
    Abstract: A power consumption control device for detecting output of a pulse signal from an output terminal of an oscillator as an operation monitoring target and outputting a power consumption reduction signal when the pulse signal is not detected in a predetermined period of time, includes a p-type transistor and an n-type transistor which are connected in series and have a gate to which the output terminal is connected, and detecting means for detecting a through current flowing through the p-type transistor and n-type transistor, and outputs a power consumption reduction signal when the through current is not detected in a predetermined period of time.
    Type: Application
    Filed: May 5, 2005
    Publication date: July 13, 2006
    Inventors: Katsuya Shimizu, Hiroko Kinoshita
  • Semiconductor integrated circuit
    Patent number: 6323526
    Abstract: A semiconductor integrated circuit includes four electrodes arranged in a matrix and a wire connecting between two electrodes which are diagonally positioned to each other and selected from the four electrodes. The two remaining electrodes are diagonally positioned to each other across the wire, and have a side thereof facing the wire and extending in parallel to a longitudinal direction of the wire.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: November 27, 2001
    Assignee: Fujitsu Limited
    Inventors: Seiiti Saitou, Katuyuki Yasukouchi, Hiroko Kinoshita, Shinichi Nakagawa