Abstract: Signal delay, etc. in a signal path from an electrode pad to a functional block is reduced. An input-output block A and an input-output block B are connected to electrode pads. A functional block A is connected to the electrode pads via the input-output block A. A functional block B is connected to the electrode pads via the input-output block B. The functional block A and the functional block B are arranged at positions opposed to each other so as to sandwich the input-output block A and the input-output block B.

Abstract: In a layout designing method of a semiconductor device, a first standard cell with a first well and a second standard cell with a second well are arranged. The first well and the second well are applied with different voltages, respectively. An empty cell is arranged in an area that a distance from the first well falls within a first distance. The second standard cell is moved such that the empty cell does not overlap with the empty cell, when the empty cell overlaps with the second well.

Abstract: According to a semiconductor device design method and apparatus of the present invention, a semiconductor device with homogenous wiring densities throughout the entire layout, and with uniform etching, is provided. In order to facilitate homogenous levels of wiring density and uniform etching within the design of the semiconductor layout after the layout has been configured (S1) using an automated layout system, certain regions of the layout are tested (S2). Once regions of low density have been determined (S3), dummy terminals are formed on power and ground lines (S11, S12). These dummy terminals are then interconnected with supplemental wiring (S13 to S16) so that the density of the selected region is brought within a predetermined allowable range.