Abstract: Provided are an asynchronous anomaly detecting circuit (101) for receiving inputs of asynchronous transmission/reception related signals including transmission data, clock and control signals etc., determining whether or not they satisfy a given signal requirement and outputting an asynchronous anomaly information, and an asynchronous anomaly relief circuit (102) for receiving inputs of the asynchronous transmission/reception related signals including the transmission data, clock and control signals etc. as well as the asynchronous anomaly information and outputting the asynchronous transmission/reception related signals that have been relief-processed. These circuits allow relieving asynchronous anomalies in the semiconductor integrated circuit on a chip without requiring rework of a mask.