Patents by Inventor Hiromasa Mochiki
Hiromasa Mochiki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9496150Abstract: An etching processing method for etching a substrate formed with a target film and a mask film is performed in a substrate processing apparatus including a first and a second power supply for respectively supplying a higher and a lower high frequency power to a processing space and a mounting table, and a DC power supply for supplying a DC power to an electrode. The method includes a modification step for modifying a shape of a pattern formed on the mask film; and an etching step for etching the target film by using the mask film. The mask film is etched by the plasma in the modification step. Further, in the etching step, the DC power is applied to the electrode and the lower high frequency power is applied to the mounting table in a pulse wave form in which a higher and a lower power level are repeated.Type: GrantFiled: December 19, 2014Date of Patent: November 15, 2016Assignee: TOKYO ELECTRON LIMITEDInventors: Hiromasa Mochiki, Shin Okamoto, Takashi Nishijima, Fumio Yamazaki
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Patent number: 9373521Abstract: An etching processing method for etching a substrate formed with a target film and a mask film is performed in a substrate processing apparatus including a first and a second power supply for respectively supplying a higher and a lower high frequency power to a processing space and a mounting table, and a DC power supply for supplying a DC power to an electrode. The method includes a modification step for modifying a shape of a pattern formed on the mask film; and an etching step for etching the target film by using the mask film. The mask film is etched by the plasma in the modification step. Further, in the etching step, the DC power is applied to the electrode and the lower high frequency power is applied to the mounting table in a pulse wave form in which a higher and a lower power level are repeated.Type: GrantFiled: November 10, 2010Date of Patent: June 21, 2016Assignee: TOKYO ELECTRON LIMITEDInventors: Hiromasa Mochiki, Shin Okamoto, Takashi Nishijima, Fumio Yamazaki
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Patent number: 9136097Abstract: A shower plate of a processing gas supply unit disposed in a processing chamber of a substrate processing apparatus to supply a processing gas into a processing space in the processing chamber. The shower plate is interposed between a processing gas introduction space formed in the processing gas supply unit for introduction of the processing gas and the processing space. The shower plate includes processing gas supply passageways which allow the processing gas introduction space to communicate with the processing space. The processing gas supply passageways include gas holes formed toward the processing gas introduction space and gas grooves formed toward the processing space, the gas holes and gas grooves communicating with each other. A total flow path cross sectional area of all the gas grooves is larger than a total flow path cross sectional area of all the gas holes.Type: GrantFiled: November 7, 2008Date of Patent: September 15, 2015Assignee: TOKYO ELECTRON LIMITEDInventors: Chishio Koshimizu, Kazuki Denpoh, Hiromasa Mochiki
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Publication number: 20150194441Abstract: Disclosed is method of manufacturing a semiconductor device. The method includes: forming an insulating film on one side of a substrate; forming a carbon film on the insulating film formed in the forming of the insulating film; forming an insulating film-carbon film laminate including a plurality of insulating films and carbon films alternately laminated on the one side of the substrate, by repeating the forming of the insulating film and the forming of the carbon film multiple times; removing the carbon films included in the insulating film-carbon film laminate; and forming electrode films in regions from which the carbon films are removed in the removing of the carbon films to obtain an insulating film-electrode film laminate in which the insulating films and the electrode films are laminated in a plurality of layers.Type: ApplicationFiled: January 8, 2015Publication date: July 9, 2015Applicant: TOKYO ELECTRON LIMITEDInventors: Koichi YATSUDA, Takaaki TSUNOMURA, Takashi HAYAKAWA, Hiromasa MOCHIKI, Kazuhide HASEBE
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Publication number: 20150170933Abstract: An etching processing method for etching a substrate formed with a target film and a mask film is performed in a substrate processing apparatus including a first and a second power supply for respectively supplying a higher and a lower high frequency power to a processing space and a mounting table, and a DC power supply for supplying a DC power to an electrode. The method includes a modification step for modifying a shape of a pattern formed on the mask film; and an etching step for etching the target film by using the mask film. The mask film is etched by the plasma in the modification step. Further, in the etching step, the DC power is applied to the electrode and the lower high frequency power is applied to the mounting table in a pulse wave form in which a higher and a lower power level are repeated.Type: ApplicationFiled: December 19, 2014Publication date: June 18, 2015Applicant: TOKYO ELECTRON LIMITEDInventors: Hiromasa MOCHIKI, Shin OKAMOTO, Takashi NISHIJIMA, Fumio YAMAZAKI
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Patent number: 8685267Abstract: There is provided a substrate processing method capable of preventing the decrease in etching efficiency by positive ions and increasing the overall etching efficiency by using negative ions. The substrate processing method includes applying a plasma RF and a bias RF in the pattern of a pulse wave, respectively. The substrate processing method repeatedly performs the steps of: (3b) etching a substrate by positive ions in plasma by applying both the plasma RF and the bias RF; (3c) generating negative ions in a processing chamber by stopping the application of both the plasma RF and the bias RF; and (3a) attracting the negative ions to the substrate by applying the bias RF and stopping the application of the plasma RF. A duty ratio of the bias RF is set to be greater than a duty ratio of the plasma RF.Type: GrantFiled: June 22, 2011Date of Patent: April 1, 2014Assignee: Tokyo Electron LimitedInventors: Koichi Yatsuda, Hiromasa Mochiki
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Patent number: 8641916Abstract: A plasma etching method for forming a hole in an etching target film by a plasma processing apparatus is provided. The apparatus includes an RF power supply for applying RF power for plasma generation to at least one of upper and lower electrodes, and a DC power supply for applying minus DC voltage to the upper electrode. A first condition that plasma is generated by turning on the RF power supply and minus DC voltage is applied to the upper electrode and a second condition that the plasma is extinguished by turning off the RF power supply and minus DC voltage is applied to the upper electrode are alternately repeated. Etching is performed by positive ions in the plasma under the first condition and negative ions are supplied into the hole by the DC voltage to neutralize positive ions in the hole under the second condition.Type: GrantFiled: January 25, 2010Date of Patent: February 4, 2014Assignee: Tokyo Electron LimitedInventors: Koichi Yatsuda, Yoshinobu Ooya, Shin Okamoto, Hiromasa Mochiki
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Patent number: 8383001Abstract: There is provided a plasma etching method capable of achieving a sufficient organic film modifying effect by high-velocity electrons. In forming a hole in an etching target film by plasma etching, a first condition of generating plasma within a processing chamber by way of turning on a plasma-generating high frequency power application unit and a second condition of not generating the plasma within the processing chamber by way of turning off the plasma-generating high frequency power application unit are repeated alternately. Further, a negative DC voltage is applied from a first DC power supply such that an absolute value of the applied negative DC voltage during a period of the second condition is greater than an absolute value of the applied negative DC voltage during a period of the first condition.Type: GrantFiled: February 18, 2010Date of Patent: February 26, 2013Assignee: Tokyo Electron LimitedInventors: Hiromasa Mochiki, Yoshinobu Ooya, Fumio Yamazaki, Toshio Haga
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Publication number: 20110318933Abstract: There is provided a substrate processing method capable of preventing the decrease in etching efficiency by positive ions and increasing the overall etching efficiency by using negative ions. The substrate processing method includes applying a plasma RF and a bias RF in the pattern of a pulse wave, respectively. The substrate processing method repeatedly performs the steps of: (3b) etching a substrate by positive ions in plasma by applying both the plasma RF and the bias RF; (3c) generating negative ions in a processing chamber by stopping the application of both the plasma RF and the bias RF; and (3a) attracting the negative ions to the substrate by applying the bias RF and stopping the application of the plasma RF. A duty ratio of the bias RF is set to be greater than a duty ratio of the plasma RF.Type: ApplicationFiled: June 22, 2011Publication date: December 29, 2011Applicant: Tokyo Electron LimitedInventors: Koichi Yatsuda, Hiromasa Mochiki
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Publication number: 20110244691Abstract: An etching processing method for etching a substrate formed with a target film and a mask film is performed in a substrate processing apparatus including a first and a second power supply for respectively supplying a higher and a lower high frequency power to a processing space and a mounting table, and a DC power supply for supplying a DC power to an electrode. The method includes a modification step for modifying a shape of a pattern formed on the mask film; and an etching step for etching the target film by using the mask film. The mask film is etched by the plasma in the modification step. Further, in the etching step, the DC power is applied to the electrode and the lower high frequency power is applied to the mounting table in a pulse wave form in which a higher and a lower power level are repeated.Type: ApplicationFiled: November 10, 2010Publication date: October 6, 2011Applicant: TOKYO ELECTRON LIMITEDInventors: Hiromasa MOCHIKI, Shin OKAMOTO, Takashi NISHIJIMA, Fumio YAMAZAKI
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Patent number: 7829469Abstract: A method and system for adjusting and controlling the plasma uniformity in a plasma processing system is described. The plasma processing system includes an electron source electrode to which direct current (DC) power is coupled in order to generate a ballistic electron beam during the etching of the substrate. A ring electrode, provided about a periphery of the substrate and opposite the electron source electrode, is utilized to create a ring hollow cathode plasma to affect changes in the distribution of plasma density.Type: GrantFiled: December 11, 2006Date of Patent: November 9, 2010Assignee: Tokyo Electron LimitedInventors: Lee Chen, Hiromasa Mochiki
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Publication number: 20100213162Abstract: There is provided a plasma etching method capable of achieving a sufficient organic film modifying effect by high-velocity electrons. In forming a hole in an etching target film by plasma etching, a first condition of generating plasma within a processing chamber by way of turning on a plasma-generating high frequency power application unit and a second condition of not generating the plasma within the processing chamber by way of turning off the plasma-generating high frequency power application unit are repeated alternately. Further, a negative DC voltage is applied from a first DC power supply such that an absolute value of the applied negative DC voltage during a period of the second condition is greater than an absolute value of the applied negative DC voltage during a period of the first condition.Type: ApplicationFiled: February 18, 2010Publication date: August 26, 2010Applicant: TOKYO ELECTRON LIMITEDInventors: Hiromasa Mochiki, Yoshinobu Ooya, Fumio Yamazaki, Toshio Haga
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Publication number: 20100190350Abstract: A plasma etching method for forming a hole in an etching target film by a plasma processing apparatus is provided. The apparatus includes an RF power supply for applying RF power for plasma generation to at least one of upper and lower electrodes, and a DC power supply for applying minus DC voltage to the upper electrode. A first condition that plasma is generated by turning on the RF power supply and minus DC voltage is applied to the upper electrode and a second condition that the plasma is extinguished by turning off the RF power supply and minus DC voltage is applied to the upper electrode are alternately repeated. Etching is performed by positive ions in the plasma under the first condition and negative ions are supplied into the hole by the DC voltage to neutralize positive ions in the hole under the second condition.Type: ApplicationFiled: January 25, 2010Publication date: July 29, 2010Applicant: TOKYO ELECTRON LIMITEDInventors: Koichi YATSUDA, Yoshinobu Ooya, Shin Okamoto, Hiromasa Mochiki
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Patent number: 7723236Abstract: Mixing ratio and flow rate of a first gaseous mixture supplied to a central portion of the substrate are set. Subsequently, etching is performed by changing a mixing ratio of a second gaseous mixture supplied to an outer peripheral portion of the substrate while a setting of the first gaseous mixture is fixed, thereby, setting the mixing ratio of the second gaseous mixture based on an etching result to make etching selectivities and shapes at the central portion and the outer peripheral portion of the substrate uniform. Then, etching is performed by changing a flow rate of the second gaseous mixture while settings of the first gaseous mixture and the mixing ratio of the second gaseous mixture are fixed, thereby, setting the flow rate of the second gaseous mixture based on etching results to make etching rates at the central portion and the outer peripheral portion of the substrate uniform.Type: GrantFiled: January 18, 2006Date of Patent: May 25, 2010Assignee: Tokyo Electron LimitedInventor: Hiromasa Mochiki
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Patent number: 7709397Abstract: A method for etching a high-k dielectric layer on a substrate in a plasma processing system is described. The high-k dielectric layer can, for example, comprise HfO2. The method comprises elevating the temperature of the substrate above 200° C. (i.e., typically of order 400° C.), introducing a process gas comprising a halogen-containing gas, igniting a plasma from the process gas, and exposing the substrate to the plasma. The process gas can further include a reduction gas in order to improve the etch rate of HfO2 relative to Si and SiO2.Type: GrantFiled: May 25, 2004Date of Patent: May 4, 2010Assignee: Tokyo Electron LimitedInventors: Lee Chen, Hiromitsu Kambara, Nobuhiro Iwama, Akiteru Ko, Hiromasa Mochiki, Masaaki Hagihara
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Publication number: 20090120582Abstract: A shower plate of a processing gas supply unit disposed in a processing chamber of a substrate processing apparatus to supply a processing gas into a processing space in the processing chamber. The shower plate is interposed between a processing gas introduction space formed in the processing gas supply unit for introduction of the processing gas and the processing space. The shower plate includes processing gas supply passageways which allow the processing gas introduction space to communicate with the processing space. The processing gas supply passageways include gas holes formed toward the processing gas introduction space and gas grooves formed toward the processing space, the gas holes and gas grooves communicating with each other. A total flow path cross sectional area of all the gas grooves is larger than a total flow path cross sectional area of all the gas holes.Type: ApplicationFiled: November 7, 2008Publication date: May 14, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Chishio Koshimizu, Kazuki Denpoh, Hiromasa Mochiki
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Publication number: 20080135518Abstract: A method and system for adjusting and controlling the plasma uniformity in a plasma processing system is described. The plasma processing system includes an electron source electrode to which direct current (DC) power is coupled in order to generate a ballistic electron beam during the etching of the substrate. A ring electrode, provided about a periphery of the substrate and opposite the electron source electrode, is utilized to create a ring hollow cathode plasma to affect changes in the distribution of plasma density.Type: ApplicationFiled: December 11, 2006Publication date: June 12, 2008Applicant: TOKYO ELECTRON LIMITEDInventors: Lee Chen, Hiromasa Mochiki
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Patent number: 7172969Abstract: A method and system is described for preparing a film stack, and forming a feature in the film stack using a plurality of dry etching processes. The feature formed in the film stack can include a gate structure having a critical dimension of approximately 25 nm or less. This critical dimension can be formed in the polysilicon layer using four mask layers.Type: GrantFiled: August 26, 2004Date of Patent: February 6, 2007Assignees: Tokyo Electron Limited, International Business Machines CorporationInventors: Annie Xia, Hiromasa Mochiki, Arpan P Mahorowala
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Publication number: 20060157445Abstract: Mixing ratio and flow rate of a first gaseous mixture supplied to a central portion of the substrate are set. Subsequently, etching is performed by changing a mixing ratio of a second gaseous mixture supplied to an outer peripheral portion of the substrate while a setting of the first gaseous mixture is fixed, thereby, setting the mixing ratio of the second gaseous mixture based on an etching result to make etching selectivities and shapes at the central portion and the outer peripheral portion of the substrate uniform. Then, etching is performed by changing a flow rate of the second gaseous mixture while settings of the first gaseous mixture and the mixing ratio of the second gaseous mixture are fixed, thereby, setting the flow rate of the second gaseous mixture based on etching results to make etching rates at the central portion and the outer peripheral portion of the substrate uniform.Type: ApplicationFiled: January 18, 2006Publication date: July 20, 2006Applicant: TOKYO ELECTRON LIMITEDInventor: Hiromasa Mochiki
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Publication number: 20060049139Abstract: A method and system is described for etching a tunable etch resistant anti-reflective (TERA) coating. The TERA coating can be utilized, for example, as a hard mask, or as an anti-reflective coating for complementing a lithographic structure. The TERA coating can include a structural formula R:C:H:X, wherein R is selected from the group consisting of Si, Ge, B, Sn, Fe, Ti, and combinations thereof, and wherein X is not present or is selected from the group consisting of one or more of O, N, S, and F. During the formation of a structure in a film stack, a pattern is transferred to the TERA coating using dry plasma etching having a SF6-based etch chemistry.Type: ApplicationFiled: August 26, 2004Publication date: March 9, 2006Applicants: Tokyo Electron Limited, International Business Machines CorporationInventors: Annie Xia, Hiromasa Mochiki, Arpan Mahorowala