Patents by Inventor Hiromasa Saito
Hiromasa Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240149380Abstract: Provided are a processing device, a detecting system, a processing method, a program, and a storage medium that obtain a position of a weld portion of a joined body with higher accuracy. A processing device according to an embodiment receives intensity data of a reflected wave obtained by transmitting an ultrasonic wave along a first direction toward a joined body. The device designates a weld portion of the joined body by using the intensity data. The device calculates a first center position of the weld portion in a first plane crossing the first direction.Type: ApplicationFiled: January 17, 2024Publication date: May 9, 2024Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATIONInventors: Hiromasa TAKAHASHI, Yasunori CHIBA, Masahiro SAITO, Takuya ATSUMI, Shin MATSUMOTO
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Patent number: 11965249Abstract: A surface-treated metal material includes a metal sheet, a plating layer formed on the metal sheet and containing aluminum, magnesium, and zinc, and a composite coating formed on a surface of the plating layer, the composite coating including an organic silicon compound, one or two of a zirconium compound and a titanium compound, a phosphoric acid compound, a fluorine compound, and a vanadium compound, wherein, when a surface of the composite coating is analyzed at a spot size of ?30 ?m using micro-fluorescent X-rays, a maximum value of V/Zn, which is a mass ratio of a V content to a Zn content, is 0.010 to 0.100.Type: GrantFiled: March 19, 2020Date of Patent: April 23, 2024Assignee: NIPPON STEEL CORPORATIONInventors: Hiromasa Shoji, Kiyokazu Ishizuka, Kohei Tokuda, Mamoru Saito, Yasuto Goto, Ikumi Tokuda
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Publication number: 20240047504Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; a plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.Type: ApplicationFiled: September 14, 2023Publication date: February 8, 2024Applicant: SONY GROUP CORPORATIONInventors: Taiichiro WATANABE, Akihiro YAMADA, Hideo KIDO, Hiromasa SAITO, Keiji MABUCHI, Yuko OHGISHI
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Publication number: 20240025909Abstract: An object of the present invention is to provide a composition that gives a cured product excellent in heat resistance and solvent resistance. The present invention provides a compound represented by the general formula (I) below and having at least one reactive group in a molecule. In the formula, A represents a hydrocarbon ring having 6 carbon atoms; X1 and X2 each represent, for example, an aryl group having 6 to 30 carbon atoms and optionally substituted with a reactive group or a group having a reactive group; R1, R2, R3, R4, R6, R7, R8, and R9 each represent, for example, a hydrogen atom, a reactive group, or a hydrocarbon group having 1 to 20 carbon atoms and optionally substituted with a reactive group; and R5 and R10 each represent, for example, a hydrogen atom, or a hydrocarbon group having 1 to 20 carbon atoms and optionally substituted with a reactive group.Type: ApplicationFiled: December 16, 2021Publication date: January 25, 2024Inventors: Hiromasa SAITO, Yousuke MURAMATSU, Mizuki SUZUKI, Masatomi IRISAWA
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Publication number: 20240006432Abstract: An imaging device according to an embodiment of the present disclosure includes: a pixel; a first transistor; first separation sections; and a second separation section. In the pixel, a plurality of photoelectric conversion regions is formed side by side in a plane of a semiconductor substrate. The first transistor is provided above each of the plurality of photoelectric conversion regions. The first transistor extracts electric charge generated in each of the plurality of photoelectric conversion regions. The first separation sections are continuously provided around the plurality of photoelectric conversion regions. The second separation section is provided adjacent to the first separation sections between the plurality of adjacent photoelectric conversion regions. The second separation section has a predetermined electric potential indirectly applied thereto by individually applying electric potentials to a layer below the first transistor and the first separation sections.Type: ApplicationFiled: September 6, 2021Publication date: January 4, 2024Inventor: HIROMASA SAITO
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Patent number: 11817473Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.Type: GrantFiled: September 2, 2022Date of Patent: November 14, 2023Assignee: SONY GROUP CORPORATIONInventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
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Publication number: 20220415961Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.Type: ApplicationFiled: September 2, 2022Publication date: December 29, 2022Applicant: Sony Group CorporationInventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
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Patent number: 11489001Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.Type: GrantFiled: July 17, 2020Date of Patent: November 1, 2022Assignee: SONY CORPORATIONInventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
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Publication number: 20220173150Abstract: The present technology relates to a solid-state imaging apparatus designed to improve sensitivity while preventing worsening of color mixing. A substrate, a plurality of photoelectric conversion regions provided in the substrate, a color filter provided on the upper side of the photoelectric conversion regions, a trench provided through the substrate and provided between the photoelectric conversion regions, and a recessed region including a plurality of recesses provided on the light-receiving surface side of the substrate above the photoelectric conversion regions are included. The color filter over adjacent two of the photoelectric conversion regions is of the same color. The number of the recesses of the recessed region is larger at a high image height than at an image height center. The present technology can be applied to, for example, a back-illuminated solid-state imaging apparatus etc.Type: ApplicationFiled: March 30, 2020Publication date: June 2, 2022Inventors: TOMOKI KUROSE, TOMOYUKI ARAI, HIROMASA SAITO, SHINJI NAKAGAWA, JUNJI HAYAFUJI, HIROFUMI YAMADA
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Publication number: 20200350358Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.Type: ApplicationFiled: July 17, 2020Publication date: November 5, 2020Applicant: Sony CorporationInventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
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Patent number: 10748958Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.Type: GrantFiled: December 20, 2018Date of Patent: August 18, 2020Assignee: Sony CorporationInventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
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Publication number: 20200235142Abstract: Provided are a solid-state imaging device and an electronic device in which the influence of dark current is reduced. The solid-state imaging device includes a plurality of first pixel units arranged in a matrix, each first pixel unit having one pixel and one on-chip lens, at least one second pixel unit having two pixels and one on-chip lens provided across the two pixels, a pixel separation layer, and at least one contact that exists within a region of the second pixel unit or is provided under the pixel separation layer adjacent to the region of the second pixel unit, and connects the pixel separation layer to a reference potential wiring, in which the second pixel units are arranged at predetermined intervals at least in a row extending in a first direction of the matrix of the first pixel units.Type: ApplicationFiled: May 22, 2018Publication date: July 23, 2020Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Hiromasa SAITO, Shohei SHIMADA
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Publication number: 20190123093Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.Type: ApplicationFiled: December 20, 2018Publication date: April 25, 2019Applicant: Sony CorporationInventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
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Patent number: 10199427Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.Type: GrantFiled: November 18, 2013Date of Patent: February 5, 2019Assignee: Sony CorporationInventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
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Patent number: 9117719Abstract: A solid-state imaging apparatus includes a semiconductor substrate, an upper layer film, and on-chip lenses. On the semiconductor substrate, a plurality of pixels are formed. The upper layer film is laminated on the semiconductor substrate. The on-chip lenses are formed on the upper layer film so as to correspond to the respective pixels. A pupil correction amount of one of the on-chip lenses is changed depending on a distance between a center of a pixel area and the on-chip lens, and depending on a film thickness of the upper layer film at a position of the on-chip lens on the upper layer film.Type: GrantFiled: September 24, 2013Date of Patent: August 25, 2015Assignee: SONY CORPORATIONInventor: Hiromasa Saito
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Publication number: 20140151533Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.Type: ApplicationFiled: November 18, 2013Publication date: June 5, 2014Applicant: Sony CorporationInventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
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Publication number: 20140091415Abstract: A solid-state imaging apparatus includes a semiconductor substrate, an upper layer film, and on-chip lenses. On the semiconductor substrate, a plurality of pixels are formed. The upper layer film is laminated on the semiconductor substrate. The on-chip lenses are formed on the upper layer film so as to correspond to the respective pixels. A pupil correction amount of one of the on-chip lenses is changed depending on a distance between a center of a pixel area and the on-chip lens, and depending on a film thickness of the upper layer film at a position of the on-chip lens on the upper layer film.Type: ApplicationFiled: September 24, 2013Publication date: April 3, 2014Applicant: Sony CorporationInventor: Hiromasa Saito
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Patent number: 8614759Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.Type: GrantFiled: June 8, 2009Date of Patent: December 24, 2013Assignee: Sony CorporationInventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
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Publication number: 20090303371Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.Type: ApplicationFiled: June 8, 2009Publication date: December 10, 2009Applicant: SONY CORPORATIONInventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
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Patent number: 4128630Abstract: A cosmetic obtained by treating an inorganic pigment powder with a metal ion blocking agent, drying the product, and mixing a perfume with the resulting pigment. The perfume in the resulting cosmetic is very stable for long periods of time.Type: GrantFiled: April 6, 1977Date of Patent: December 5, 1978Assignee: Shiseido Co., Ltd.Inventors: Katsutake Hayashi, Tutomu Saitoh, Katsuyuki Yomogida, Hiromasa Saito