Abstract: A gate electrode, a drain region and a source region of a memory cell transistor are formed in an element forming region in a memory cell region. A gate electrode and source/drain regions of a transistor for peripheral circuitry are formed in an element forming region in a peripheral circuitry region. A dummy gate electrode is formed on an element isolation insulating film, and the position of each end of the dummy gate electrode and that of corresponding end of element isolation insulating film are different. An interlayer insulating film is formed on a semiconductor substrate to cover the gate electrode and the dummy electrode. Thus, a semiconductor device in which occurrence of crystal defects is suppressed can be obtained.

Abstract: A gate electrode, a drain region and a source region of a memory cell transistor are formed in an element forming region in a memory cell region. A gate electrode and source/drain regions of a transistor for peripheral circuitry are formed in an element forming region in a peripheral circuitry region. A dummy gate electrode is formed on an element isolation insulating film, and the position of each end of the dummy gate electrode and that of corresponding end of element isolation insulating film are different. An interlayer insulating film is formed on a semiconductor substrate to cover the gate electrode and the dummy electrode. Thus, a semiconductor device in which occurrence of crystal defects is suppressed can be obtained.

Abstract: A process for a semiconductor device includes the following steps applied to a silicon substrate wherein a floating gate electrode having sidewalls is formed above the semiconductor substrate with a tunnel oxide film intervened and wherein active regions are arranged in places adjoining both sides of floating gate electrode, as seen from above, and arsenic is injected into said active regions as an impurity: the lamp annealing step of carrying out a heat treatment in the atmosphere of a first gas mixture which includes nitrogen and oxygen; and the oxygen film formation step of carrying out a heat treatment in the atmosphere of a second gas mixture which includes oxygen so as to form an oxide film on sidewalls of floating gate electrode after the lamp annealing step.

Abstract: A process for a semiconductor device includes the following steps applied to a silicon substrate wherein a floating gate electrode having sidewalls is formed above the semiconductor substrate with a tunnel oxide film intervened and wherein active regions are arranged in places adjoining both sides of floating gate electrode, as seen from above, and arsenic is injected into said active regions as an impurity:

Abstract: There is described a method for manufacturing a semiconductor device, in which an isolation oxide film having a superior dimensional accuracy and an isolation oxide film of a high withstanding voltage are manufactured in simple processes. A semiconductor device including a plurality of isolation oxide films of different thickness is manufactured. A nitride film and a resist film are grown on a silicon substrate, and openings are formed in the resist film. Openings are formed in the nitride film while the resist film is used as a mask. Isolation oxide films are formed below the openings through thermal oxidation. An opening diameter of the large opening formed in the nitride film is set to a value of more than 0.6 &mgr;m, whereas an opening diameter of the smaller opening is set a predetermined value of less than 0.6 &mgr;m. More specifically, the removal value of the smaller opening is set to a value required for imparting a desired thickness to the isolation oxide film 42.

Abstract: A field oxide film which is fine and having smaller upheaval of a bird's head is formed, so as to improve electrical characteristic of a conductive layer formed with end portions positioned on the field oxide film. A planarizing silicon film is formed on a silicon nitride film and a thermal oxide film, so as to planarize a concave generated between the thermal oxide film and a silicon nitride film. The planarizing silicon film is thermally oxidized, so as to form a planarizing thermal oxide film integrated with the thermal oxide film. Thereafter, the planarizing thermal oxide film is etched back to form the field oxide film, and the silicon nitride film and a polycrystalline silicon film are removed. Thereafter, the conductive layer with end portions positioned on the field oxide film is formed.