Patents by Inventor Hiromi Morita
Hiromi Morita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240090535Abstract: Provided is a method of producing a feed or food product in which an inner layer is encrusted with a gelled outer layer composition, the method including the steps of: preparing an outer layer composition feedstock by adding a secondary feedstock to a protein feedstock and/or a starch feedstock that forms a gel upon heating and then mixing by stirring, and preparing an inner layer composition that is encrusted with the outer layer composition; extrusion molding with an extruder provided with a double nozzle so as to cover a surface of the inner layer composition while simultaneously gelling the outer layer composition feedstock by heat treatment; and cutting a continuously extruded cylindrically shaped product to a fixed length with a shutter mechanism while simultaneously encrusting a cut surface with the gelled outer layer composition.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Inventors: Tsuyoshi GOTO, Kazuya SHIMIZU, Hiromi ITO, Minoru MORITA, Yuji TAKAYAMA
-
Publication number: 20220367863Abstract: An aluminum foil comprising an aluminum foil substrate that has a porous region, wherein the porous region is formed throughout the entirety of the aluminum foil substrate in the thickness direction thereof.Type: ApplicationFiled: October 13, 2020Publication date: November 17, 2022Applicant: Panasonic Intellectual Property Management Co., Ltd.Inventors: Tooru Matsui, Hiromi Morita, Yoshiki Iwai, Kohei Hara, Hirotetsu Suzuki, Motohiro Sakata
-
Patent number: 8431440Abstract: A substrate table used for manufacturing a chip is provided. The substrate table includes a substrate stage, a substrate placement surface formed on the substrate stage, and on which a substrate is placed, and a guiding member that can project and retract from the substrate placement surface. The guiding member positions the substrate when the guiding member is at a projected position abutting an edge portion of the substrate placed on the substrate placement surface, and the guiding member retracts at a time of applying a tape to the substrate.Type: GrantFiled: June 16, 2010Date of Patent: April 30, 2013Assignee: Lapis Semiconductor Co., Ltd.Inventor: Hiromi Morita
-
Patent number: 8410620Abstract: The present invention relates to a primer resin for semiconductor devices which comprises a polyamide resin represented by the following formula (1): (wherein, R1 represents a tetravalent aromatic tetracarboxylic acid residue selected from the group consisting of pyromellitic acid, 3,4,3?,4?-diphenyl ether tetracarboxylic acid, 2,3,6,7-naphthalenetetracarboxylic acid and 3,4,3?,4?-benzophenone tetracarboxylic acid, R2 represents at least one kind of divalent diamine residue selected from the group consisting of diamino-4,4?-hydroxydiphenylsulfone, 4,4?-diamino-3,3?5,5?-tetraethyldiphenylmethane and 1,3-bis-(aminophenoxy)benzene, and n is a repeating number and represents a positive number of 10 to 1000) and has a lead frame comprising copper or 42 alloy, a semiconductor device having said primer resin layer between a lead frame comprising copper or 42 alloy and a cured product of a sealing resin, and a semiconductor sealing epoxy resin composition containing said primer resin; and said semiconductor devicType: GrantFiled: September 18, 2008Date of Patent: April 2, 2013Assignee: Nippon Kayaku Kabushiki KaishaInventors: Makoto Uchida, Shigeru Moteki, Ryutaro Tanaka, Hiromi Morita
-
Publication number: 20100261336Abstract: A substrate table used for manufacturing a chip is provided. The substrate table includes a substrate stage, a substrate placement surface formed on the substrate stage, and on which a substrate is placed, and a guiding member that can project and retract from the substrate placement surface. The guiding member positions the substrate when the guiding member is at a projected position abutting an edge portion of the substrate placed on the substrate placement surface, and the guiding member retracts at a time of applying a tape to the substrate.Type: ApplicationFiled: June 16, 2010Publication date: October 14, 2010Inventor: Hiromi Morita
-
Publication number: 20100207282Abstract: The present invention relates to a primer resin for semiconductor devices which comprises a polyamide resin represented by the following formula (1): (wherein, R1 represents a tetravalent aromatic tetracarboxylic acid residue selected from the group consisting of pyromellitic acid, 3,4,3?,4?-diphenyl ether tetracarboxylic acid, 2,3,6,7-naphthalenetetracarboxylic acid and 3,4,3?,4?-benzophenone tetracarboxylic acid, R2 represents at least one kind of divalent diamine residue selected from the group consisting of diamino-4,4?-hydroxydiphenylsulfone, 4,4?-diamino-3,3?5,5?-tetraethyldiphenylmethane and 1,3-bis-(aminophenoxy)benzene, and n is a repeating number and represents a positive number of 10 to 1000) and has a lead frame comprising copper or 42 alloy, a semiconductor device having said primer resin layer between a lead frame comprising copper or 42 alloy and a cured product of a sealing resin, and a semiconductor sealing epoxy resin composition containing said primer resin; and said semiconductor devicType: ApplicationFiled: September 18, 2008Publication date: August 19, 2010Applicant: Nippon Kayaku Kabushiki KaishaInventors: Makoto Uchida, Shigeru Moteki, Ryutaro Tanaka, Hiromi Morita
-
Patent number: 7763916Abstract: A substrate table used for manufacturing a chip is provided. The substrate table includes a substrate stage, a substrate placement surface formed on the substrate stage, and on which a substrate is placed, and a guiding member that can project and retract from the substrate placement surface. The guiding member positions the substrate when the guiding member is at a projected position abutting an edge portion of the substrate placed on the substrate placement surface, and the guiding member retracts at a time of applying a tape to the substrate.Type: GrantFiled: April 17, 2008Date of Patent: July 27, 2010Assignee: Oki Semiconductor Co., Ltd.Inventor: Hiromi Morita
-
Publication number: 20080293187Abstract: A substrate table used for manufacturing a chip is provided. The substrate table includes a substrate stage, a substrate placement surface formed on the substrate stage, and on which a substrate is placed, and a guiding member that can project and retract from the substrate placement surface. The guiding member positions the substrate when the guiding member is at a projected position abutting an edge portion of the substrate placed on the substrate placement surface, and the guiding member retracts at a time of applying a tape to the substrate.Type: ApplicationFiled: April 17, 2008Publication date: November 27, 2008Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventor: Hiromi Morita
-
Publication number: 20020182248Abstract: This invention aims at improving stability of drugs which have poor stability in aqueous solution, and the stability of such drugs are improved by incorporating the drugs in liposomes which have a sphingolipid as the main component of the liposomal membrane-constituting lipids.Type: ApplicationFiled: August 29, 2001Publication date: December 5, 2002Applicant: DAIICHI PHARMACEUTICAL CO., LTD.Inventors: Hitoshi Yamauchi, Hiromi Morita, Hiroshi Kikuchi
-
Publication number: 20010006648Abstract: This invention aims at improving stability of drugs which have poor stability in aqueous solution, and the stability of such drugs are improved by incorporating the drugs in liposomes which have a sphingolipid as the main component of the liposomal membrane-constituting lipids.Type: ApplicationFiled: August 25, 1998Publication date: July 5, 2001Inventors: HITOSHI YAMAUCHI, HIROMI MORITA, HIROSHI KIKUCHI
-
Patent number: 5780571Abstract: This invention provides resins and resin compositions which afford cured products with high heat resistance, low water absorption and high adhesion which are useful as electric and electronic materials. Resins obtained by condensation reaction between 4,4'-di(.omega.-substituted methyl)biphenyl or the like and naphthols; epoxy resins obtained by glycidyleterifying said resins; epoxy resin compositions containing these resins; and cured products thereof are disclosed.Type: GrantFiled: June 19, 1997Date of Patent: July 14, 1998Assignee: Nippon Kayaku Kabushiki KaishaInventors: Hiroaki Ohno, Hiromi Morita, Shigeru Moteki, Yasumasa Akatsuka
-
Patent number: 5376380Abstract: A method of producing liposomal products which comprises treating a positively or negatively charged, freeze- or spray-dried liposomal preparation with an aqueous solution of a drug charged oppositely to the charge of the liposomes.Type: GrantFiled: June 22, 1993Date of Patent: December 27, 1994Assignee: Daiichi Pharmaceutical Co., Ltd.Inventors: Hiroshi Kikuchi, Kiyoto Yachi, Hiromi Morita, Sadao Hirota
-
Patent number: 5303482Abstract: A wafer keeping apparatus includes a closed wafer keeping space, and an arrangement for circulating an inert gas through a filter and then through the wafer keeping space. In one embodiment, several wafer keeping shelves are each provided within the space, and the inert gas is supplied through a respective filter to flow across each shelf. In another embodiment, a plurality of wafer keeping spaces are each accessible through a respective door which forms an airtight seal when it is closed, and respective filters are provided on opposite sides of the space, the inert gas being supplied to the space through one filter and exiting the space through the other filter. In a further embodiment, several of the wafer keeping spaces are provided at angularly and vertically spaced locations in a rotatable stocker body provided within a casing, and several vertically spaced doors are provided on the casing to provide access to respective wafer keeping spaces in the stocker body.Type: GrantFiled: January 28, 1992Date of Patent: April 19, 1994Assignee: Shinko Electric Co., Ltd.Inventors: Teppei Yamashita, Masanao Murata, Tsuyoshi Tanaka, Teruya Morita, Hitoshi Kawano, Atsushi Okuno, Masanori Tsuda, Mitsuhiro Hayashi, Hiromi Morita
-
Patent number: 5155202Abstract: A phenolic novolak resin comprising a compound represented by the general formula [I]: ##STR1## wherein X is H or ##STR2## R is an alkyl group having 1 to 4 carbon atoms, and n is 1 to 10, particularly a phenolic novolak epoxy resin, and material, and a cured substance therefrom, and a process for producing the resin are disclosed. This resin is excellent in heat resistance and in reluctance to absorb water as compared with conventional phenolic resins, and useful in sealing electronic parts, molding, and laminating.Type: GrantFiled: February 6, 1991Date of Patent: October 13, 1992Assignee: Nippon Kayaku Kabushiki KaishaInventors: Hiromi Morita, Kazuyuki Murata, Ichiro Kimura, Susumu Nagao