Patents by Inventor Hiromi Shikata

Hiromi Shikata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7058221
    Abstract: A method of recognizing an object based on pattern matching using a gray-scale normalized correlation method includes storing a reference image including a foreground and a background each having a predetermined value of density distribution; inputting an image of the object which includes a foreground and a background each having a predetermined average value of density distribution; storing a function for giving the predetermined values of density distribution of the reference image equal to the predetermined average values of density distribution of the input image, respectively; and obtaining a maximum normalized correlation coefficient between the reference image and the input image using the function.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: June 6, 2006
    Assignee: Tani Electronics Industry Co., Ltd.
    Inventor: Hiromi Shikata
  • Patent number: 5493510
    Abstract: A method of and an apparatus for placing blocks in a semiconductor integrated circuit determined the placement of a plurality of blocks having different sizes. An externally contacting frame is set for the plurality of blocks initially placed in such a manner as to eliminate overlapping between the blocks. The blocks are moved by compressing the externally contacting frame by a predetermined length in a first direction, and the blocks in which overlapping has consequently occurred are moved, or deformed without changing their areas. Further, the blocks are moved by compressing the externally contacting frame by a predetermined length in a second direction perpendicular to the first direction, and the blocks in which overlapping has consequently occurred are moved, or deformed without changing their areas. The compression is repeated in the two directions until a target size is obtained.
    Type: Grant
    Filed: November 8, 1993
    Date of Patent: February 20, 1996
    Assignee: Kawasaki Steel Corporation
    Inventor: Hiromi Shikata
  • Patent number: 5309371
    Abstract: There are provided a method of and an apparatus for designing a circuit block layout in an integrated circuit wherein minimization of a total wiring length among the circuit blocks and compaction of the circuit blocks are automatically achieved upon automatically laying out the circuit blocks and determining wiring among those circuit blocks, by initially laying out the circuit blocks using a spring model of a mass point system where circuit blocks with no size are coupled through springs, configuring at least partial circuit blocks as circles to re-lay out the circuit blocks such that there is eliminated any overlapping among the circuit blocks, compacting the external shape of an assembly of the circuit blocks by matching the external shape with the frame of a die and altering the shape of each circuit block from the circle to an actual shape.
    Type: Grant
    Filed: June 26, 1990
    Date of Patent: May 3, 1994
    Assignee: Kawasaki Steel Corporation
    Inventors: Hiromi Shikata, Yoshito Muraishi, Shoichi Moriya, Naoyasu Seki