Abstract: The present invention provides a color image processing system for processing drawings at high speed while reproducing color tone with fidelity. The color image processing system includes a digital processor that performs a raster operation on multigradation image data and generates an output image represented by a first plurality of color components. The system also includes a processor which separates the output image data into a second plurality of color components and stores the separated data in a memory. The system includes a reverse color separator which transforms the stored image data back into image data represented by the first plurality of color components and supplies this transformed image data to the digital processor. In a preferred embodiment, the digital processor performs an under color removal/black generation conversion to separate the output image data resulting from the raster operation into cyan, magenta, yellow and black color components.

Abstract: The color image processor in accordance with the invention has a raster circuit 1 for receiving data about an image of multiple gray levels of plural colors, an UCR/BG circuit 2 for decomposing the image data received from the raster circuit 1 by the use of input Raster Operation codes according to color materials of plural colors, rasterizing the image data into a buffer memory 5, and generating black, and a binarization circuit 3 for binarizing raster data about each gray level and converting the data into data about images each having one gray level. If the aforementioned Raster Operation codes are other than Raster Operation codes having a base image, the raster output function, the UCR/BG functions, and the binarization function are performed simultaneously.

Abstract: A printing apparatus comprises CPUs provided for corresponding one of a plurality of colors, each of which generates image data of a specified color; memories, each of which stores the image data of the specified color; system ASICs, each of which manages the memories; video output controllers, each outputting the image data supplied from the corresponding system ASICs as a video signal; and image generating sections, each generating an image based on the video signal outputted from the video output controllers.