Patents by Inventor Hiromichi Watari

Hiromichi Watari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10303687
    Abstract: A pattern matching component is provided. The pattern matching component utilizes a plurality of processors to efficiently identify and retrieve information from a plurality of data sources. In some examples, the pattern matching component concurrently executes multiple portions of a data access plan, such as a query execution plan, using a plurality of processors disposed within a multi-core processor. The pattern matching component may concurrently execute multiple portions of the data access plan using a plurality of processors in a distributed system. Concurrent execution of at least some of the operations required to identify and retrieve the information results in increased efficiency over conventional query execution methods.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: May 28, 2019
    Assignee: Parallel Universe, Inc.
    Inventor: Hiromichi Watari
  • Publication number: 20180060391
    Abstract: A pattern matching component is provided. The pattern matching component utilizes a plurality of processors to efficiently identify and retrieve information from a plurality of data sources. In some examples, the pattern matching component concurrently executes multiple portions of a data access plan, such as a query execution plan, using a plurality of processors disposed within a multi-core processor. The pattern matching component may concurrently execute multiple portions of the data access plan using a plurality of processors in a distributed system. Concurrent execution of at least some of the operations required to identify and retrieve the information results in increased efficiency over conventional query execution methods.
    Type: Application
    Filed: September 1, 2016
    Publication date: March 1, 2018
    Applicant: Parallel Universe, Inc.
    Inventor: Hiromichi Watari
  • Patent number: 9852180
    Abstract: According to one aspect, a computer system configured to access distributed data is provided. The system comprising a memory including a plurality of data sources, a plurality of processors, and a pattern matching component executed by at least one processor of the plurality of processors and configured to execute a query execution plan using a first processor of the plurality of processors concurrently with a second processor of the plurality of processors, wherein the first processor processes a first data source of the plurality of data sources identified in the query execution plan and the second processor processes a second data source of the plurality of data sources identified in the query execution plan.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: December 26, 2017
    Assignee: Parallel Universe, Inc.
    Inventor: Hiromichi Watari
  • Publication number: 20160335320
    Abstract: According to one aspect, a computer system configured to access distributed data is provided. The system comprising a memory including a plurality of data sources, a plurality of processors, and a pattern matching component executed by at least one processor of the plurality of processors and configured to execute a query execution plan using a first processor of the plurality of processors concurrently with a second processor of the plurality of processors, wherein the first processor processes a first data source of the plurality of data sources identified in the query execution plan and the second processor processes a second data source of the plurality of data sources identified in the query execution plan.
    Type: Application
    Filed: June 22, 2016
    Publication date: November 17, 2016
    Applicant: Parallel Universe, Inc.
    Inventor: Hiromichi Watari
  • Patent number: 9378246
    Abstract: According to one aspect, a computer system configured to access distributed data is provided. The system comprising a memory including a plurality of data sources, a plurality of processors, and a pattern matching component executed by at least one processor of the plurality of processors and configured to execute a query execution plan using a first processor of the plurality of processors concurrently with a second processor of the plurality of processors, wherein the first processor processes a first data source of the plurality of data sources identified in the query execution plan and the second processor processes a second data source of the plurality of data sources identified in the query execution plan.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: June 28, 2016
    Inventor: Hiromichi Watari
  • Publication number: 20130297646
    Abstract: According to one aspect, a computer system configured to access distributed data is provided. The system comprising a memory including a plurality of data sources, a plurality of processors, and a pattern matching component executed by at least one processor of the plurality of processors and configured to execute a query execution plan using a first processor of the plurality of processors concurrently with a second processor of the plurality of processors, wherein the first processor processes a first data source of the plurality of data sources identified in the query execution plan and the second processor processes a second data source of the plurality of data sources identified in the query execution plan.
    Type: Application
    Filed: March 15, 2013
    Publication date: November 7, 2013
    Inventor: Hiromichi Watari
  • Patent number: 5459738
    Abstract: An apparatus and method for digital circuit testing in which latches store a single command for each assigned node in a circuit to be tested. Buffers are used to drive the nodes of the circuit being tested in accordance with the drive commands. The outputs from the circuit being tested are selectively applied to at least one comparator. A multiplexor reduces the number of comparators required for accessing the all pertinent nodes of the digital circuit being tested.
    Type: Grant
    Filed: January 26, 1994
    Date of Patent: October 17, 1995
    Inventor: Hiromichi Watari
  • Patent number: 4562553
    Abstract: A floating point arithmetic system with rounding anticipation including an arithmetic unit for arithmetically combining two mantissas; a carry circuit for determining whether the sum will overflow upon the addition of two mantissas and whether the difference will have a leading zero upon the subtraction of two mantissas; the subtrahend in subtraction and the augend in addition include guard, round, and sticky digits; a rounding circuit is responsive to the carry circuit for rounding the least significant digit of the sum when the sum will overflow and for designating for rounding the guard digit of the sum when the sum will not overflow, for designating for rounding the round digit of the difference when the difference will have a leading zero, and for designating for rounding the guard digit of the difference when the difference will not have a leading zero; and means for introducing to the arithmetic unit at the designated digit during the arithmetic combining of the two mantissas an amount equal to one-hal
    Type: Grant
    Filed: March 19, 1984
    Date of Patent: December 31, 1985
    Assignee: Analogic Corporation
    Inventors: Bruno A. Mattedi, Hiromichi Watari