Abstract: A semiconductor light-emitting element manufacturing method including: a first step in which a first n-type semiconductor layer is laminated onto a substrate in a first organometallic chemical vapor deposition apparatus; and a second step in which a regrowth layer, a second n-type semiconductor layer, an active layer, and a p-type semiconductor layer are sequentially laminated onto the aforementioned first n-type semiconductor layer in a second organometallic chemical vapor deposition apparatus.

Abstract: A commanded negative-sequence current is added to a commanded current so as to suppress double-frequency pulsation on the DC side. The commanded negative-sequence current is found from three values (i.e., the detected value of positive-sequence voltage vector on the power-supply side, the detected value of negative-sequence voltage vector, and a commanded positive-sequence current). Thus, the pulsations which occur on the DC side of a semiconductor power converter and which have a frequency double the power-supply frequency are suppressed even when the AC power supply is at fault while assuring stability of the current control system, thus permitting stable and continuous operation.

Abstract: A method for manufacturing a semiconductor light emitting element (1) which includes a first step of forming a first n-type semiconductor layer (12c) on a substrate (11) and a second step of sequentially forming a regrowth layer (12d) of the first n-type semiconductor layer (12c), a second n-type semiconductor layer (12b), a light emitting layer (13), and a p-type semiconductor layer (14) on the first n-type semiconductor layer (12c). In the step of forming the second n-type semiconductor layer (12b), a step (1) of supplying Si less than that forming the regrowth layer (12d) as a dopant to form a first layer of the second n-type semiconductor layer and a step (2) of supplying the Si more than that in the step (1) to form a second layer of the second n-type semiconductor layer are performed in this order.

Abstract: Provided is a method of manufacturing a semiconductor light emitting element that is capable of making a light emitting wavelength distribution ? of a semiconductor light emitting layer that is obtained small. The method includes a process of laminating a re-growth layer of a compound semiconductor layer on the compound semiconductor substrate which is obtained by forming at least one compound semiconductor layer on a substrate and in which a warping amount H is within a range of 50 ?m?H?250 ?m. The method adopts a method of manufacturing a semiconductor light emitting element including an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer that are formed from a compound semiconductor.

Abstract: The present invention provides a method for manufacturing a group III nitride semiconductor light emitting element, with which warping can be suppressed upon the formation of respective layers on the substrate, a semiconductor layer including a light emitting layer of excellent crystallinity can be formed, and excellent light emission characteristics can be obtained; such a group III nitride semiconductor light emitting element; and a lamp. Specifically disclosed is a method for manufacturing a group III nitride semiconductor light emitting element, in which an intermediate layer, an underlayer, an n-type contact layer, an n-type cladding layer, a light emitting layer, a p-type cladding layer, and a p-type contact layer are laminated in sequence on a principal plane of a substrate, wherein a substrate having a diameter of 4 inches (100 mm) or larger, with having an amount of warping H within a range from 0.

Abstract: The semiconductor light-emitting device (11) of the present invention includes a substrate (1); a laminate semiconductor layer (15) comprised of an n-type semiconductor layer (3) formed on the substrate (1), a light-emitting layer (4) laminated on the n-type semiconductor layer (3) and a p-type semiconductor layer (5) laminated on the light-emitting layer (4); a concavo-convex part (33) for improving a light extraction efficiency, which is formed on all or a part of a top surface (15a) of the laminate semiconductor layer (15); a high-concentration p-type semiconductor layer (8) having a higher dopant concentration than that of the p-type semiconductor layer (5), which is laminated on a convex part (33a) that constitutes the concavo-convex part (33) of the laminate semiconductor layer (15); and a translucent current diffusion layer (20) laminated on at least the high-concentration p-type semiconductor layer (8).

Abstract: The present invention is a method for producing a group III nitride semiconductor layer in which a single crystal group III nitride semiconductor layer (103) is formed on a substrate (101), the method including: a substrate processing step of forming, on the (0001) C-plane of the substrate (101), a plurality of convex parts (12) of surfaces (12c) not parallel to the C-plane, to thereby form, on the substrate, an upper surface (10) that is composed of the convex parts (12) and a flat surface (11) of the C-plane; and an epitaxial step of epitaxially growing the group III nitride semiconductor layer (103) on the upper surface (10), to thereby embed the convex parts (12) in the group III nitride semiconductor layer (103).

Abstract: Provided is a method of manufacturing a semiconductor light emitting element that is capable of making a light emitting wavelength distribution ? of a semiconductor light emitting layer that is obtained small. The method includes a process of laminating a re-growth layer of a compound semiconductor layer on the compound semiconductor substrate which is obtained by forming at least one compound semiconductor layer on a substrate and in which a warping amount H is within a range of 50 ?m?H?250 ?m. The method adopts a method of manufacturing a semiconductor light emitting element including an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer that are formed from a compound semiconductor.

Abstract: A group III nitride semiconductor light emitting device including an LED structure formed on top of a single crystal, base layer (103) formed on top of a substrate (101) including a principal plane (10) having a flat surface (11) configured from a (0001) C plane, and a plurality of convex portions (12) including a surface (12c) non-parallel to the C plane having a width (d1) of 0.05 to 1.5 ?m and height (H) of 0.05 to 1 ?m, the base layer is formed by causing a group III nitride semiconductor to grow epitaxially so as to cover the flat surface and convex portions, and the width (d1) of the convex portions and top portion thickness (H2) of the base layer at the positions of the top portions (12e) of the convex portions satisfy: H2=kd1 (wherein 0.5<k<5, and H2=0.5 ?m or more).

Abstract: Provided is a method for manufacturing a semiconductor light emitting element (1) in which a defect is less likely to occur in a light emitting layer and a p-type semiconductor layer due to the surface of a second n-type semiconductor layer and which is capable of obtaining a high output. The method for manufacturing a semiconductor light emitting element includes a first step of forming a first n-type semiconductor layer (12c) on a substrate (11) and a second step of sequentially forming a regrowth layer (12d) of the first n-type semiconductor layer (12c), a second n-type semiconductor layer (12b), a light emitting layer (13), and a p-type semiconductor layer (14) on the first n-type semiconductor layer (12c).

Abstract: Provided is a group-III nitride semiconductor light-emitting device which has a high level of crystallinity and superior internal quantum efficiency and which is capable of enabling acquisition of high level light emission output, and a manufacturing method thereof, and a lamp. An AlN seed layer composed of a group-III nitride based compound is laminated on a substrate 11, and on this AlN seed layer, there are sequentially laminated each layer of an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer respectively composed of a group-III nitride semiconductor, wherein the full width at half-maximum of the X-ray rocking curve of the (0002) plane of the p-type semiconductor layer 16 is 60 arcsec or less, and the full width at half-maximum of the X-ray rocking curve of the (10-10) plane is 250 arcsec or less.

Abstract: A wind power generation system includes an excessive current consumption device, an AC input of which is connected between a generator rotor and an excitation converter on a system failure to detect a DC voltage ascent of the excitation converter and operate a shunt circuit on the system failure.

Abstract: A commanded negative-sequence current is added to a commanded current so as to suppress double-frequency pulsation on the DC side. The commanded negative-sequence current is found from three values (i.e., the detected value of positive-sequence voltage vector on the power-supply side, the detected value of negative-sequence voltage vector, and a commanded positive-sequence current). Thus, the pulsations which occur on the DC side of a semiconductor power converter and which have a frequency double the power-supply frequency are suppressed even when the AC power supply is at fault while assuring stability of the current control system, thus permitting stable and continuous operation.

Abstract: A semiconductor light-emitting element manufacturing method including: a first step in which a first n-type semiconductor layer is laminated onto a substrate in a first organometallic chemical vapor deposition apparatus; and a second step in which a regrowth layer, a second n-type semiconductor layer, an active layer, and a p-type semiconductor layer are sequentially laminated onto the aforementioned first n-type semiconductor layer in a second organometallic chemical vapor deposition apparatus.

Abstract: An object of the present invention is to obtain a group III nitride compound semiconductor stacked structure where a group III nitride compound semiconductor layer having good crystallinity is stably stacked on a dissimilar substrate. The group III nitride compound semiconductor stacked structure of the present invention is a group III nitride compound semiconductor stacked structure comprising a substrate having provided thereon a first layer comprising a group III nitride compound semiconductor and a second layer being in contact with the first layer and comprising a group III nitride compound semiconductor, wherein the first layer contains a columnar crystal with a definite crystal interface and the columnar crystal density is from 1×103 to 1×105 crystals/?m2.

Abstract: An object of the present invention is to provide a Group III nitride semiconductor element which comprises a thick AlGaN layer exhibiting high crystallinity and containing no cracks, and which does not include a thick GaN layer (which generally serves as a light-absorbing layer in an ultraviolet LED). The inventive Group III nitride semiconductor element comprises a substrate; a first nitride semiconductor layer composed of AlN which is provided on the substrate; a second nitride semiconductor layer composed of Alx1Ga1-x1N (0?x1?0.1) which is provided on the first nitride semiconductor layer; and a third nitride semiconductor layer composed of Alx2Ga1-x2N (0<x2<1 and x1+0.02?x2) which is provided on the second nitride semiconductor layer.

Abstract: In a wind power generation system, an energy consuming unit is connected to a DC part of a generator-side converter. A shunt circuit is connected between the generator-side converter and a rotor of an AC-excited power generator. In the event of system failure, the switching operation of the converter is stopped, the shunt circuit is put into operation, and the energy consuming unit is put into operation so that DC voltage (voltage of the DC part) is maintained within a prescribed range.

Abstract: To shorten a startup interval to reach a synchronizing condition, a phase difference and an amplitude difference between the grid voltage and the stator voltage of one phase of a winding are obtained. The difference in amplitude is decreased prior to or in parallel to synchronizing the stator voltage with the grid voltage. The calculated compensation phase compensation value is used as an initial value for synchronizing at the next synchronizing operation.

Abstract: In a wind turbine generator system including an AC exciting converter a grid side converter, and a controller configured to control the AC-exciting converter and the grid side converter, the controller operates a short-circuiting circuit when decrease in the grid voltage and increase in the DC voltage are detected.

Abstract: To shorten a startup interval to reach a synchronizing condition, a phase difference and an amplitude difference between the grid voltage and the stator voltage of one phase of a winding are obtained. The difference in amplitude is decreased prior to or in parallel to synchronizing the stator voltage with the grid voltage. The calculated compensation phase compensation value is used as an initial value for synchronizing at the next synchronizing operation.