Abstract: A connector includes a coated electric wire, a connector terminal, a connector housing, and a holder. The connector housing includes an insertion portion having an insertion hole in which the coated electric wire is inserted, a housing portion that surrounds a periphery of the terminal portion of the coated electric wire inserted in the insertion hole, and an electric wire covering portion that protrudes to a back surface side of the insertion portion and covers an outer circumference of a coating portion of the coated electric wire. The holder includes a housing holding portion that holds an outer surface of the electric wire covering portion and an electric wire holding portion that holds an outer circumference of at least a part of the coating portion of the coated electric wire protruding from the electric wire covering portion to a back surface side.

Abstract: Provided is a particulate combustion catalyst including a carrier formed of monoclinic zirconium oxide particles, and metallic Ag or Ag oxide, which serves as a catalyst component and is supported on the carrier, wherein the amount of the catalyst component is 0.5 to 10 mass %, as reduced to metallic Ag, on the basis of the mass of the carrier, and preferably, the catalyst has a BET specific surface area of 8 to 21 m2/g. Also provided are a particulate filter coated with the particulate combustion catalyst; and an exhaust gas cleaning apparatus including a particulate filter coated with the particulate combustion catalyst.

Abstract: Provided is a particulate combustion catalyst including a carrier formed of monoclinic zirconium oxide particles, and metallic Ag or Ag oxide, which serves as a catalyst component and is supported on the carrier, wherein the amount of the catalyst component is 0.5 to 10 mass %, as reduced to metallic Ag, on the basis of the mass of the carrier, and preferably, the catalyst has a BET specific surface area of 8 to 21 m2/g. Also provided are a particulate filter coated with the particulate combustion catalyst; and an exhaust gas cleaning apparatus including a particulate filter coated with the particulate combustion catalyst.

Abstract: Provided is a particulate combustion catalyst including a carrier formed of monoclinic zirconium oxide particles, and metallic Ag or Ag oxide, which serves as a catalyst component and is supported on the carrier, wherein the amount of the catalyst component is 0.5 to 10 mass %, as reduced to metallic Ag, on the basis of the mass of the carrier, and preferably, the catalyst has a BET specific surface area of 8 to 21 m2/g. Also provided are a particulate filter coated with the particulate combustion catalyst; and an exhaust gas cleaning apparatus including a particulate filter coated with the particulate combustion catalyst.

Abstract: The proliferation of cardiomyocytes is induced by expressing cyclin and CDK in the cardiomyocytes, and by suppressing the function or action of a Cip/Kip family protein or inhibiting the production of a Cip/Kip family protein. Among the Cip/Kip family proteins, it is preferable to suppress the function of p27KiP1 or inhibiting the production thereof. As a recombinant vector to be used therefor, there is provided a vector comprising: (1) a cyclin gene; (2) a cyclin-dependent kinase gene; and (3) one or a plurality selected from the group consisting of a gene encoding a factor that inhibits the function or action of a Cip/Kip family protein and a nucleic acid sequence that inhibits the production of Cip/Kip family protein.

Abstract: An insulated gate FET such as a power MOS FET is made by forming a rectangular parallelepiped-shaped recess in a direction that the side walls of the recess make 45.degree. angle against the <100> direction of the silicon substrate having (100) plane as principal surface, and the vertical side walls of (010) or (001) planes are used as channel region of the insulated gate FET, thereby assuring a large electron mobility in the channel, hence low channel resistance suitable for high power operation.

Abstract: A novel self-align type method of making an FET with a very short gate length and a good high frequency characteristic, and a low noise characteristic, the method comprising the steps of:forming on a silicon epitaxial layer (13) of n-type conductivity a doped oxide film (14) containing boron as an impurity to give p-type conductivity,forming a mask (15a, 16a) containing Si.sub.3 N.sub.

Abstract: An epitaxial layer having a specified conductivity type formed on a semiinsulative or high resistivity semiconductor substrate or insulative substrate is anodized (anodically oxidized) by a predetermined D.C. current under an illumination of light of a predetermined intensity, thereby a depletion layer is formed beneath an oxide layer, which is formed by the anodizing, and the anodizing ceases in areas where the bottom face of the depletion layer reaches the semiinsulative or high resistivity semiconductor substrate or insulative substrate thus retaining a layer of highly uniform thickness layer of the epitaxial grown layer on the substrate.

Abstract: In the process of forming a thermal oxide film or heat treatment of an oxide film in making a semiconductor device comprising a compound semiconductor of arsenic, the semiconductor is handled in an atmosphere containing arsenic oxide vapor in order to prevent evaporation of the arsenic tri-oxide in the thermal oxidation film or the oxide film under heat treatment, thereby to form a thermal oxide film having good chemical stability and good electrical characteristics, or to improve the oxide film so as to have good chemical stability and good electrical characteristics.

Abstract: Both source-electrodes (S1 and S2) or both drain-electrodes of a pair of field-effect transistors (FETs) (F1 and F2) of n-channel type and p-channel type, respectively, both to be electrically actuated in a depletion mode are connected to each other, or the source of one FET and the drain of the other FET are connected to each other, through a variable resistance element (F3) inbetween, whereby the pair of FETs (F1 and F3) are series-connected through the variable resistance element (F3) inbetween, the gate-electrode (g1 or g2) of each FET is connected to the drain-electrode (d2 or d1) or the source-electrode of the other FET (F2 or F1) that is not connected to the variable resistance element (F3), and a pair of external terminals (1 and 2) are connected to said gate electrodes (g1, g2) those are connected to said drain electrodes (d2 and d1) or source electrodes.When a voltage of specified range is applied across both non-series-connected electrodes, i.e.