Patents by Inventor Hiromu Haruki

Hiromu Haruki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5010384
    Abstract: In a gate turn-off thyristor having a plurality of gate turn-off thyristor segments, each having a four-layer upon pnpn structure, a resistance layer is interposed between the emitter layer and the cathode electrode of each segment. A voltage drop occurs across the resistance layer and this voltage drop prevents a current concentration to a specific segment especially at the last stage of a turn-off process, so that the current flows in the respective remaining segments is improved. The voltage drop has a function of shunting the anode current so that the shunted current flows into the gate. Accordingly, the currents flowing through the respective segments and the turn-off times of the respective segments are intended to be made uniform. Therefore, the controllable on-state current can be considerably increased.
    Type: Grant
    Filed: July 20, 1989
    Date of Patent: April 23, 1991
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Hiromu Haruki, Fumiaki Kirihata, Osamu Hashimoto
  • Patent number: 4692345
    Abstract: In the particular embodiments of the invention disclosed in the specification, a single crystal silicon plate having heavy metal impurities is coated with a layer of amorphous silicon several hundred to several thousand Angstroms thick in a vacuum vessel by a glow discharge at a pressure of 1 to 10 Torr and a temperature of about 200.degree. C. Silane gas is used to form a non-doped layer and about 1% of diborane or phosphine gas may be added to form a p-type or an n-type layer, respectively. The glow discharge is produced by a high frequency voltage applied to electrodes in the vacuum vessel but a direct current discharge may be used initially to provide improved adhesion of the layer. When the plate is heated above the crystallization temperature of the a-Si layer, heavy metal impurities are gettered from the single crystal.
    Type: Grant
    Filed: May 20, 1986
    Date of Patent: September 8, 1987
    Assignee: Fuji Electric Corporate Research and Devel., Ltd.
    Inventors: Masaharu Nishiura, Hiromu Haruki
  • Patent number: 4606630
    Abstract: In the embodiment disclosed in the specification, a rangefinder comprises left and right sensor arrays for receiving the light of an image of an object, evaluative signal generating circuits for defining the interrelation between left and right image data trains representing the distribution of light intensity within the object, an optimum shift value decision circuit for determining the shift number in the image data train corresponding to the highest correlation between both the image data trains, a range signal computing circuit for computing a range signal representing the distance up to the object from the optimum shifted number, and a control circuit for controlling and regulating a predetermined portion in equipment utilizing the range signal. The evaluative signal generating circuits are arranged to generate the evaluative signals simultaneously and transmit them in parallel to the shift value circuit defining the correlation between the left and right image data trains.
    Type: Grant
    Filed: July 10, 1984
    Date of Patent: August 19, 1986
    Assignees: Fuji Electric Corporate Research and Development Co., Ltd., Fuji Electric Company, Ltd.
    Inventors: Hiromu Haruki, Shotaro Yokoyama, Takashi Nishibe
  • Patent number: 4555636
    Abstract: A pattern detector comprises a plurality of photoelectric converter elements having thin film semiconductors disposed adjacently in a line in one plane. The converter elements are shaped that they overlap one another by a predetermined length when viewed in a direction perpendicular to a direction in which the converter elements are disposed. The photoelectric converter elements may be disposed in a plurality of parallel arrays, staggered so that the center of one element in one array is opposed to a space between neighboring elements of the other array.
    Type: Grant
    Filed: September 14, 1982
    Date of Patent: November 26, 1985
    Assignees: Fuji Electric Company, Ltd., Fuji Electric Corporate Research & Development, Ltd.
    Inventors: Hakubun Fujisawa, Masaharu Nishiura, Hiromu Haruki, Yoshiyuki Uchida
  • Patent number: 4456782
    Abstract: A solar cell array is equipped with serially or parallel connected reverse polarity diodes formed simultaneously with the array. The diodes are constituted by one or more solar cells of the array which may be shaded to prevent photoelectric conversion, and which are electrically connected in reverse polarity with respect to the remaining cells.
    Type: Grant
    Filed: September 20, 1982
    Date of Patent: June 26, 1984
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Masaharu Nishiura, Hiroshi Sakai, Masahide Miyagi, Yoshiyuki Uchida, Hiromu Haruki