Patents by Inventor Hironobu Chiba

Hironobu Chiba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11213133
    Abstract: A dielectric elastomer driving sensor system includes: a dielectric elastomer transducer portion including a dielectric elastomer layer and a pair of electrode layers that sandwich the dielectric elastomer layer, where the pair of electrode layers include a driving region and a sensor region that are partitioned from each other; a power supply unit that applies a voltage to the driving region; a detection unit that detects a change in capacitance in the sensor region; and a control unit that controls the power supply unit and the detection unit. With this configuration, both the driving function and the sensor function can be performed.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: January 4, 2022
    Assignees: ZEON CORPORATION
    Inventors: Seiki Chiba, Mikio Waki, Hironobu Kondo, Masahiro Ishikawa, Keiji Osugi
  • Publication number: 20210286584
    Abstract: For preceding and succeeding musical pieces, an extraction unit extracts audio signal of each of a centrally localized region and a non-centrally localized region, from L and R channel signals. A reproduction control unit makes the length of a first interval from start of fade-out to end of fade-in processing for the centrally localized region shorter than that of a second interval from start of fade-out to end of fade-in processing for the non-centrally localized region, and the reproduction control unit sets the first within the second interval. The reproduction control unit causes the fade-out processing for the non-centrally localized region to end after fade-in for the non-centrally localized region started, and performs cross-fade. The reproduction control unit causes fade-out processing pertaining to the centrally localized region to end after the fade-in processing pertaining to the centrally localized region has started, and causes cross-fader reproduction to be carried out.
    Type: Application
    Filed: August 8, 2016
    Publication date: September 16, 2021
    Applicant: Pioneer Corporation
    Inventor: Hironobu CHIBA
  • Patent number: 10386266
    Abstract: An optical inspection device includes: an LED; a chart; a collimator; and a mirror. The LED irradiates the chart with light to deliver light rays to the collimator as on-axis light rays. This allows a pattern on the chart to be projected onto a center of an image sensor through the collimator and an optical system under inspection. The mirror reflects light rays delivered to the mirror through the collimator among the on-axis light rays. This allows the pattern on the chart to be projected onto a periphery of the image sensor through the optical system under inspection.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: August 20, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yoshihiro Ikawa, Hironobu Chiba, Yoshihiro Ueno
  • Publication number: 20180238769
    Abstract: An optical inspection device comprises: an LED; a chart; a collimator; and a mirror. The LED irradiates the chart with light to deliver light rays to the collimator as on-axis light rays. This allows a pattern on the chart to be projected onto a center of an image sensor through the collimator and an optical system under inspection. The mirror reflects light rays delivered to the mirror through the collimator among the on-axis light rays. This allows the pattern on the chart to be projected onto a periphery of the image sensor through the optical system under inspection.
    Type: Application
    Filed: April 24, 2018
    Publication date: August 23, 2018
    Inventors: YOSHIHIRO IKAWA, HIRONOBU CHIBA, YOSHIHIRO UENO
  • Patent number: 7119649
    Abstract: A common mode noise filter includes a first insulating layer made of magnetic material, a first conductor on the first insulating layer, a second insulating layer located on the first conductor and made of nonmagnetic material, a second conductor having a spiral shape on the second insulating layer and connected with the first conductor, a third insulating layer located on the second conductor and made of nonmagnetic material, a third conductor having a spiral shape provided on the third insulating layer, a fourth insulating layer located on the third conductor and made of nonmagnetic material, a fourth conductor connected with the third conductor, a fifth insulating layer provided on the fourth conductor and made of magnetic material. The first conductor and the second conductor provide a first coil. The third conductor and the fourth conductor provide a second coil. The third insulating layer is thicker than the second insulating layer and the fourth insulating layer.
    Type: Grant
    Filed: May 24, 2005
    Date of Patent: October 10, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Atsushi Shinkai, Hironobu Chiba, Shogo Nakayama, Hideki Tanaka
  • Publication number: 20060158301
    Abstract: A common mode noise filter includes a first insulating layer made of magnetic material, a first conductor on the first insulating layer, a second insulating layer located on the first conductor and made of nonmagnetic material, a second conductor having a spiral shape on the second insulating layer and connected with the first conductor, a third insulating layer located on the second conductor and made of nonmagnetic material, a third conductor having a spiral shape provided on the third insulating layer, a fourth insulating layer located on the third conductor and made of nonmagnetic material, a fourth conductor connected with the third conductor, a fifth insulating layer provided on the fourth conductor and made of magnetic material. The first conductor and the second conductor provide a first coil. The third conductor and the fourth conductor provide a second coil. The third insulating layer is thicker than the second insulating layer and the fourth insulating layer.
    Type: Application
    Filed: May 24, 2005
    Publication date: July 20, 2006
    Inventors: Atsushi Shinkai, Hironobu Chiba, Shogo Nakayama, Hideki Tanaka
  • Patent number: 7078999
    Abstract: A lamination ceramic chip inductor includes at least one pair of insulation layers; and at least one conductive pattern which is interposed between the at least one pair of insulation layers and forming a conductive coil. At least one conductive pattern includes a conductive pattern formed as a result of electroforming.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: July 18, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Eiichi Uriu, Osamu Makino, Hironobu Chiba, Chisa Yokota
  • Publication number: 20050188529
    Abstract: A lamination ceramic chip inductor includes at least one pair of insulation layers; and at least one conductive pattern which is interposed between the at least one pair of insulation layers and forming a conductive coil. At least one conductive pattern includes a conductive pattern formed as a result of electroforming.
    Type: Application
    Filed: April 14, 2005
    Publication date: September 1, 2005
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Eiichi Uriu, Osamu Makino, Hironobu Chiba, Chisa Yokota
  • Publication number: 20050190036
    Abstract: A lamination ceramic chip inductor includes at least one pair of insulation layers; and at least one conductive pattern which is interposed between the at least one pair of insulation layers and forming a conductive coil. At least one conductive pattern includes a conductive pattern formed as a result of electroforming.
    Type: Application
    Filed: April 15, 2005
    Publication date: September 1, 2005
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Eiichi Uriu, Osamu Makino, Hironobu Chiba, Chisa Yokota
  • Patent number: 6914510
    Abstract: A lamination ceramic chip inductor includes at least one pair of insulation layers; and at least one conductive pattern which is interposed between the at least one pair of insulation layers and forming a conductive coil. At least one conductive pattern includes a conductive pattern formed as a result of electroforming.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: July 5, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Eiichi Uriu, Osamu Makino, Hironobu Chiba, Chisa Yokota
  • Patent number: 6911888
    Abstract: A lamination ceramic chip inductor includes at least one pair of insulation layers; and at least one conductive pattern which is interposed between the at least one pair of insulation layers and forming a conductive coil. At least one conductive pattern includes a conductive pattern formed as a result of electroforming.
    Type: Grant
    Filed: January 15, 2001
    Date of Patent: June 28, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Eiichi Uriu, Osamu Makino, Hironobu Chiba, Chisa Yokota
  • Patent number: 6911887
    Abstract: A lamination ceramic chip inductor includes at least one pair of insulation layers; and at least one conductive pattern which is interposed between the at least one pair of insulation layers and forming a conductive coil. At least one conductive pattern includes a conductive pattern formed as a result of electroforming.
    Type: Grant
    Filed: March 15, 2000
    Date of Patent: June 28, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Eiichi Uriu, Osamu Makino, Hironobu Chiba, Chisa Yokota
  • Patent number: 6909350
    Abstract: A lamination ceramic chip inductor includes at least one pair of insulation layers; and at least one conductive pattern which is interposed between the at least one pair of insulation layers and forming a conductive coil. At least one conductive pattern includes a conductive pattern formed as a result of electroforming.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: June 21, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Eiichi Uriu, Osamu Makino, Hironobu Chiba, Chisa Yokota
  • Patent number: 6853267
    Abstract: In a noise filter having a large impedance in a common mode, a first conductor and a second conductor provided on first magnetic sheets and have spiral shapes of plural turns and spaced from each other for avoiding short-circuit. The first conductor is provided inside the spiral shape of the second conductor. The other end of the first inner conductor is located adjacent to the other end of the second inner conductor. The respective other ends of the first inner conductor and the second inner conductor on the magnetic sheet are connected at the respective other ends to first and second conductors provided on another magnetic sheet.
    Type: Grant
    Filed: January 11, 2002
    Date of Patent: February 8, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hironobu Chiba, Kazuo Oishi, Eiichi Uriu, Takeshi Orita, Shogo Nakayama, Kazutoshi Matsumura, Hironori Motomitsu, Atsushi Shinkai, Tomoyuki Washizaki
  • Publication number: 20040227609
    Abstract: A lamination ceramic chip inductor includes at least one pair of insulation layers; and at least one conductive pattern which is interposed between the at least one pair of insulation layers and forming a conductive coil. At least one conductive pattern includes a conductive pattern formed as a result of electroforming.
    Type: Application
    Filed: June 16, 2004
    Publication date: November 18, 2004
    Inventors: Eiichi Uriu, Osamu Makino, Hironobu Chiba, Chisa Yokota
  • Publication number: 20040130415
    Abstract: In a noise filter having a large impedance in a common mode, a first conductor 12 and a second conductor 13 provided on first magnetic sheets 11a and 11b have spiral shapes of plural turns and spaced from each other for avoiding short-circuit. The first conductor are provided inside the spiral shape of the second conductor. The other end of the first inner conductor 12 is located adjacent to the other end of the second inner conductor 13. The respective other ends of the first inner conductor 12 and the second inner conductor 13 on the magnetic sheet are connected at the respective other ends to first and second conductors provided on another magnetic sheet.
    Type: Application
    Filed: July 10, 2003
    Publication date: July 8, 2004
    Inventors: Hironobu Chiba, Kazuo Oishi, Eiichi Uriu, Takeshi Orita, Shogo Nakayama, Kazutoshi Matsumura, Hironori Motomitsu, Atsushi Shinkai, Tomoyuki Washizaki
  • Patent number: 6631545
    Abstract: A lamination ceramic chip inductor includes at least one pair of insulation layers; and at least one conductive pattern which is interposed between the at least one pair of insulation layers and forming a conductive coil. At least one conductive pattern includes a conductive pattern formed as a result of electroforming.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: October 14, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Eiichi Uriu, Osamu Makino, Hironobu Chiba, Chisa Yokota
  • Publication number: 20030151486
    Abstract: A lamination ceramic chip inductor includes at least one pair of insulation layers; and at least one conductive pattern which is interposed between the at least one pair of insulation layers and forming a conductive coil. At least one conductive pattern includes a conductive pattern formed as a result of electroforming.
    Type: Application
    Filed: January 31, 2003
    Publication date: August 14, 2003
    Inventors: Eiichi Uriu, Osamu Makino, Hironobu Chiba, Chisa Yokota
  • Publication number: 20020041223
    Abstract: A lamination ceramic chip inductor includes at least one pair of insulation layers; and at least one conductive pattern which is interposed between the at least one pair of insulation layers and forming a conductive coil. At least one conductive pattern includes a conductive pattern formed as a result of electroforming.
    Type: Application
    Filed: January 15, 2001
    Publication date: April 11, 2002
    Inventors: Eiichi Uriu, Osamu Makino, Hironobu Chiba, Chisa Yokota
  • Publication number: 20010029662
    Abstract: A lamination ceramic chip inductor includes at least one pair of insulation layers; and at least one conductive pattern which is interposed between the at least one pair of insulation layers and forming a conductive coil. At least one conductive pattern includes a conductive pattern formed as a result of electroforming.
    Type: Application
    Filed: February 25, 1999
    Publication date: October 18, 2001
    Inventors: EIICHI URIU, OSAMU MAKINO, HIRONOBU CHIBA, CHISA YOKOTA