Patents by Inventor Hironobu Demizu

Hironobu Demizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6570368
    Abstract: An apparatus is provided to suppress an increase in the ripple voltage inevitable in a conventional switching power supply device used at low temperatures. A switching power supply device is provided that has a DC—DC converter that receives an input voltage and outputs a varying voltage by varying the ratio of on periods to off periods of a switching transistor. An error amplifier compares the output voltage of the DC—DC converter or a divided voltage thereof with a reference voltage and outputs an error voltage. An operator produces a pulse signal according to the error voltage and controls the switching transistor with the pulse signal. A gain control circuit varies the gain of the error amplifier according to at least one of the duty factor of the pulse signal and the ambient temperature.
    Type: Grant
    Filed: October 2, 2001
    Date of Patent: May 27, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hironobu Demizu
  • Publication number: 20020057125
    Abstract: To suppress an increase in the ripple voltage inevitable in a conventional switching power supply device used at low temperatures, a switching power supply device of the invention has a DC-DC converter that receives an input voltage and outputs a varying voltage by varying the ratio of on periods to off periods of a switching transistor, an error amplifier that compares the output voltage of the DC-DC converter or a divided voltage thereof with a reference voltage and outputs an error voltage, an operator that produces a pulse signal according to the error voltage and controls the switching transistor with the pulse signal, and a gain control circuit that varies the gain of the error amplifier according to at least one of the duty factor of the pulse signal and the ambient temperature.
    Type: Application
    Filed: October 2, 2001
    Publication date: May 16, 2002
    Inventor: Hironobu Demizu
  • Patent number: 5355078
    Abstract: A stabilized power supply circuit is prevented from being affected by a heavy load. A transistor (Q.sub.1) having a smaller emitter area, a transistor (Q.sub.2) having a larger emitter area, and an output transistor (Q.sub.3) are incorporated in an IC. The distance (L.sub.1) between the first transistor (Q.sub.1) and the output transistor (Q.sub.3) is longer than the distance (L.sub.2) between the second transistor (Q.sub.2) and the output transistor (Q.sub.3).
    Type: Grant
    Filed: July 2, 1993
    Date of Patent: October 11, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hironobu Demizu