Abstract: An amplifying device which amplifies a signal, includes: an amplifier which amplifies an input signal by a power supplied from a power node; a first power source which supplies a fixed voltage to the power node; a second power source which supplies a variable voltage to the power node based on an envelope signal relating to the input signal and voltage of the power node; an active short device which reduces impedance of the power node when the first power source supplies the power to the power node and the second power source does not supply the power to the power node; a synthesizer which synthesizes the envelope signal and a cancel signal so that the second power source does not supply the power to the power node according to voltage variation of the power node by the active short device.

Abstract: An amplifying apparatus includes an amplifier that amplifies a signal, using a voltage supplied; a power source unit that generates a first voltage and a second voltage having an amplitude greater than that of the first voltage; and a switching controller that, when the an envelope signal of the signal becomes current zero, switches between and supplies to the amplifier, the first voltage and the second voltage generated by the power source unit.

Abstract: An amplifying device which amplifies a signal, includes: an amplifier which amplifies an input signal by a power supplied from a power node; a first power source which supplies a fixed voltage to the power node; a second power source which supplies a variable voltage to the power node based on an envelope signal relating to the input signal and voltage of the power node; an active short device which reduces impedance of the power node when the first power source supplies the power to the power node and the second power source does not supply the power to the power node; a synthesizer which synthesizes the envelope signal and a cancel signal so that the second power source does not supply the power to the power node according to voltage variation of the power node by the active short device.

Abstract: A power supply apparatus includes a detector configured to detect a peak of a transmission signal, a determination unit configured to determine a timing when a change of a variable voltage which is output from the apparatus and which corresponds to the detected peak of the transmission signal is started in accordance with a voltage value corresponding to the peak and a change rate of the variable voltage, a generation unit configured to generate a variable voltage control signal used to start the change of the voltage at the determined timing, and an output unit configured to output a voltage in accordance with the generated variable voltage control signal.

Abstract: An error detecting unit of a phase-locked oscillator evaluates difference between a reference phase error signal output from a phase detector and a phase error signal actually output from the phase detector when a reference frequency modulation signal is output from a voltage-controlled oscillator and further detects a frequency error of the frequency modulation signal from the voltage-controlled oscillator based on a rate of change of the difference. A correction unit of the phase-locked oscillator calculates an average value of the frequency error in a predetermined section of the frequency modulation signal and corrects center frequency of the frequency modulation signal by correcting the average value to be zero, and changes the rate of change of control voltage per control step based on comparison between at least two frequency errors in one cycle of the frequency modulation signal. Thus frequency shift of the frequency modulation signal is corrected.

Abstract: An amplifying circuit includes: a waveform modifying unit which changes the signal value in the second section in such a manner so as to reduce the difference between the signal strength of a DC component of the input signal and the limit value that limits the variation range of the signal value in the first section; a DC component removing unit which removes the DC component of the input signal after the input signal has been modified by the waveform modifying unit; and an amplifying unit which amplifies the input signal whose DC component has been removed.

Abstract: A power circuit and method thereof are provided. The power circuit includes an output circuit having an alternating current-coupling element and that supplies an output signal of the output circuit to an amplifier as a driving voltage. The power circuit includes an envelope signal-extracting unit extracting an envelope signal from a carrier wave, a simulation signal-waveform generating unit generating a simulation signal including a fluctuation component occurring when the envelope signal is transmitted to the output circuit, a fluctuation component-extracting unit extracting the fluctuation component included in the simulation signal, and an inverted component-generating unit generating an inverted component obtained by performing phase inversion for the fluctuation component, where the fluctuation component occurring in the output circuit is canceled out through the inverted component.

Abstract: An amplifying circuit includes: an amplifying unit which amplifies an input signal and applies the amplified signal to a designated load; a current detection unit which detects a load current that flows into the designated load upon application of the amplified signal; an estimating unit which calculates, based on the voltage level of the input signal, an estimated value of the load current to be supplied to the load; and an adjusting unit which adjusts an input bias, to be applied to the amplifying unit, in such a manner so as to reduce a difference value representing a difference between the estimated value and the load current detected by the current detection unit.

Abstract: An amplifying apparatus includes an amplifier that amplifies a signal, using a voltage supplied; a power source unit that generates a first voltage and a second voltage having an amplitude greater than that of the first voltage; and a switching controller that, when the an envelope signal of the signal becomes current zero, switches between and supplies to the amplifier, the first voltage and the second voltage generated by the power source unit.

Abstract: In a multi-radar system, configured comprising a plurality of radar units which generate and output signals the frequency of which increases and decreases periodically, each radar unit generates and outputs signals synchronized with a prescribed sync signal, such that the upper limit and lower limit of the periodically increasing and decreasing frequency is different for the signals of each radar unit, and moreover the timing of the upper limit and lower limit of the signals substantially coincide. By this means, the frequency intervals between signals can be reduced, and more channels can be set, without causing radio wave interference.

Abstract: An amplifying circuit includes: a waveform modifying unit which changes the signal value in the second section in such a manner so as to reduce the difference between the signal strength of a DC component of the input signal and the limit value that limits the variation range of the signal value in the first section; a DC component removing unit which removes the DC component of the input signal after the input signal has been modified by the waveform modifying unit; and an amplifying unit which amplifies the input signal whose DC component has been removed.

Abstract: An amplifying circuit includes: an amplifying unit which amplifies an input signal and applies the amplified signal to a designated load; a current detection unit which detects a load current that flows into the designated load upon application of the amplified signal; an estimating unit which calculates, based on the voltage level of the input signal, an estimated value of the load current to be supplied to the load; and an adjusting unit which adjusts an input bias, to be applied to the amplifying unit, in such a manner so as to reduce a difference value representing a difference between the estimated value and the load current detected by the current detection unit.

Abstract: An error detecting unit of a phase-locked oscillator evaluates difference between a reference phase error signal output from a phase detector and a phase error signal actually output from the phase detector when a reference frequency modulation signal is output from a voltage-controlled oscillator and further detects a frequency error of the frequency modulation signal from the voltage-controlled oscillator based on a rate of change of the difference. A correction unit of the phase-locked oscillator calculates an average value of the frequency error in a predetermined section of the frequency modulation signal and corrects center frequency of the frequency modulation signal by correcting the average value to be zero, and changes the rate of change of control voltage per control step based on comparison between at least two frequency errors in one cycle of the frequency modulation signal. Thus frequency shift of the frequency modulation signal is corrected.

Abstract: In a multi-radar system, configured comprising a plurality of radar units which generate and output signals the frequency of which increases and decreases periodically, each radar unit generates and outputs signals synchronized with a prescribed sync signal, such that the upper limit and lower limit of the periodically increasing and decreasing frequency is different for the signals of each radar unit, and moreover the timing of the upper limit and lower limit of the signals substantially coincide. By this means, the frequency intervals between signals can be reduced, and more channels can be set, without causing radio wave interference.

Abstract: An ultrasonic imaging apparatus comprises an ultrasonic transducer for outputting ultrasonic beams and converting echo waves of the ultrasonic beams to a B-mode echo signal corresponding to a B-mode for obtaining a tomographic image and a D-mode echo signal corresponding to a D-mode for obtaining Doppler data, a transmitter circuit for driving the transducer for generating the ultrasonic beams for scanning a subject, a receiver circuit including a gain control circuit for controlling the gain of the B-mode and D-mode echo signals output from the ultrasonic transducer so that the level of the B-mode echo signal is made to equal to that of the D-mode echo signal and for outputting gain-controlled echo signals, and A/D converter for converting the gain-controlled signals to digital signals, and a delay/addition circuit for delaying the digital signals and adding them to output a received signal, a B-mode processor circuit for producing a B-mode image signal from the received signal, a D-mode processor circuit fo

Abstract: In the ultrasonic imaging apparatus according to the present invention, ultrasonic transducers provided in a probe for corresponding channels are driven and caused to propagate ultrasonic waves by a standard signal generating circuit, transmission delay circuits and pulsers. Then, receiving signals obtained from the ultrasonic transducers are delayed in an analog manner by analog delay circuits. The resulting delayed signals are A/D converted by analog/digital converters. The outputs of the A/D converters are delayed in a digital manner by digital delay circuits composed of semiconductor memory elements. The resulting delayed outputs are summed by a summing circuit. The output of the summing circuit is detected. Predetermined imaging data is produced based on the detected output and displayed. In order to enhance delay precision of the analog/digital converters and digital delay circuits, the delay amount of the analog delay circuits can be continuously varied in small steps.

Abstract: In response to heartbeat signals produced by an ECG adapted to detect heartbeats of a subject, an ROI (region of interest) of the subject is scanned plural times to produce a plurality of frames of Doppler image information. In this case, the starts of the scans of the ROI are sequentially delayed from corresponding heartbeat signals in increments of a regular time interval. Each frame of image information is stored in a frame memory in the form of divided sub-frame signals. Corresponding sub-frame signals of the frame signals are read from the frame memory and then synthesized to reconstruct one frame image.

Abstract: An ultrasonic pulse Doppler apparatus comprising an ultrasonic probe for transmitting ultrasonic beam into an object and receives the echoes from the object, a first processing circuit for processing the echoes received by the probe to form data of a B scan tomogram, a first monitor for displaying the B scan tomogram, beam mark setting circuit for setting a plurality of beam marks on the B scan tomogram, measuring point setting circuit for setting a plurality of blood flow measuring points on each of the beam marks, beam mark selecting circuit for selecting any one of the plurality of beam marks, measuring point selecting circuit for selecting any one of the plurality of blood flow measuring points on the selected beam mark, a second processing circuit for processing the echoes received by said probe to form a signal of a blood flow velocity at the selected measuring point, a second monitor for displaying the blood flow velocity at the selected measuring point, and modulating circuit for distinguishing the se