Abstract: A data-processing apparatus includes: a plurality of processing blocks which is connected to a common bus; a memory which includes an address space having a plurality of banks; and a common bus arbitrating section which arbitrates an access request to access the memory, and controls data delivery through the common bus that receives the access request and is provided between the plurality of processing blocks and the memory. At least one processing block among the plural processing blocks is an exchange-processing block that performs exchange of an access order to access the banks in the memory when the communication of the data is performed between the memory and the processing block through the common bus. The exchange-processing block includes a data transfer control device that performs the exchange of the access order to access the banks by controlling the order of the data.

Abstract: A data processing device includes: a processing block which is connected to a common bus and which processes a plurality of data, which is inputted simultaneously, in parallel; a memory which is consisted of address space which has a plurality of banks; and a common bus arbitration unit which arbitrates a request for access to the memory outputted from the processing block, and controls exchange of data via the common bus between the processing block whose access request has been accepted and the memory. The processing block includes a data transfer control device which changes an order of access to the bank of the memory corresponding to the respective data, unifies the respective data into an exchange data, and exchanges the exchange data with the memory when the processing block performs exchanging of the data to be processed in parallel with the memory via the common bus.

Abstract: A data processing device includes: a processing block which is connected to a common bus and which processes a plurality of data, which is inputted simultaneously, in parallel; a memory which is consisted of address space which has a plurality of banks; and a common bus arbitration unit which arbitrates a request for access to the memory outputted from the processing block, and controls exchange of data via the common bus between the processing block whose access request has been accepted and the memory. The processing block includes a data transfer control device which changes an order of access to the bank of the memory corresponding to the respective data, unifies the respective data into an exchange data, and exchanges the exchange data with the memory when the processing block performs exchanging of the data to be processed in parallel with the memory via the common bus.

Abstract: A data processing device includes: a processing block which is connected to a common bus and which processes a plurality of data, which is inputted simultaneously, in parallel; a memory which is consisted of address space which has a plurality of banks; and a common bus arbitration unit which arbitrates a request for access to the memory outputted from the processing block, and controls exchange of data via the common bus between the processing block whose access request has been accepted and the memory. The processing block includes a data transfer control device which changes an order of access to the bank of the memory corresponding to the respective data, unifies the respective data into an exchange data, and exchanges the exchange data with the memory when the processing block performs exchanging of the data to be processed in parallel with the memory via the common bus.

Abstract: A data-processing apparatus includes: a plurality of processing blocks which is connected to a common bus; a memory which includes an address space having a plurality of banks; and a common bus arbitrating section which arbitrates an access request to access the memory, and controls data delivery through the common bus that receives the access request and is provided between the plurality of processing blocks and the memory. At least one processing block among the plural processing blocks is an exchange-processing block that performs exchange of an access order to access the banks in the memory when the communication of the data is performed between the memory and the processing block through the common bus. The exchange-processing block includes a data transfer control device that performs the exchange of the access order to access the banks by controlling the order of the data.