Patents by Inventor Hironobu YOSHINO

Hironobu YOSHINO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200002591
    Abstract: A heat-storage material, in particular a chemical heat-storage material, adsorbs or desorbs water vapor (water) at a low temperature (i.e., usable at a low temperature) and stores a large amount of heat. A chemical heat-storage material includes a cyanuric acid metal salt, wherein the chemical heat-storage material generates or absorbs heat by adsorption or desorption of water vapor (water).
    Type: Application
    Filed: March 2, 2018
    Publication date: January 2, 2020
    Applicant: NISSAN CHEMICAL CORPORATION
    Inventor: Hironobu YOSHINO
  • Publication number: 20190330509
    Abstract: A heat-storage material, in particular a chemical heat-storage material that adsorbs or desorbs water vapor (water) at a low temperature and stores a large amount of heat. A chemical heat-storage material having a C2-10 aliphatic polycarboxylic acid metal salt, wherein the chemical heat-storage material generates or absorbs heat by adsorption or desorption of water vapor (water).
    Type: Application
    Filed: December 20, 2017
    Publication date: October 31, 2019
    Applicant: NISSAN CHEMICAL CORPORATION
    Inventor: Hironobu YOSHINO
  • Publication number: 20170267659
    Abstract: To provide a method for producing a compound represented by the formula (1) which is a 2-pyridone compound useful as a pharmaceutical or an intermediate for a pharmaceutical, etc. at a high yield.
    Type: Application
    Filed: May 11, 2015
    Publication date: September 21, 2017
    Applicant: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Hironobu YOSHINO, Yasuhiro UMEDA, Jun TAKEOKA, Akihiro NAGAYA, Yudai SUGAWARA, Madoka YOSHINO
  • Patent number: 9738654
    Abstract: The problem of the present invention is to provide a production method for safely synthesizing a nitrogen-containing heterocyclic N-oxide compound in high yield. Another problem of the present invention is to provide a novel N-oxide compound. There is provided a method for producing a nitrogen-containing heterocyclic N-oxide compound of Formula (2), such as 2,2,7,9-tetramethyl-2H-pyrano[2,3-g]quinoline N-oxide, by oxidizing a nitrogen-containing heterocyclic compound of Formula (1), such as 2,2,7,9-tetramethyl-2H-pyrano[2,3-g]quinoline with a persulfate.
    Type: Grant
    Filed: September 13, 2013
    Date of Patent: August 22, 2017
    Assignee: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Hironobu Yoshino, Kenichi Seki, Hirohide Kitsuyama, Ikumasa Hidaka
  • Patent number: 9464095
    Abstract: A method for producing a high-purity nitrogen-containing heterocyclic compound includes: a process (a) and a process (b): (a) a process of mixing a mixture containing a compound and as an impurity compound with a solvent and a metal salt, and (b) a process of obtaining a mixture in a solution state in which the content of the compound has decreased compared to that in the mixture in the process (a) by filtering a mixed solution obtained in the process (a), or a process of obtaining a mixture in which the content of the compound has decreased compared to that in the mixture in the process (a) by further evaporating the solvent or crystallizing following the filtering; (where R1 and R2 are each independently a hydrogen atom, a C1-6 alkyl group, etc., R3 is a hydrogen atom, a C1-6 alkyl group, etc., X is a hydrogen atom, etc.).
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: October 11, 2016
    Assignee: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Hirohide Kitsuyama, Akihiro Nagaya, Hironobu Yoshino, Ikumasa Hidaka
  • Publication number: 20160168161
    Abstract: There is provided a method for producing with a high efficiency a heterocyclic compound that is useful as a raw material for pharamaceuticals. A novel production method for producing 2,2,7,9-tetramethyl-2H-pyrano[2,3-g]quinoline (compound (6)) that has a quinoline ring and a chromene ring using N-(3-acetyl-4-hydroxyphenyl)butylamide (compound (1?)) that is commercially available as a raw material for pharamaceuticals or the like as a starting raw material; and a method for purifying compound (6), characterized by purifying by subjecting it to conversion into a salt form.
    Type: Application
    Filed: July 22, 2014
    Publication date: June 16, 2016
    Applicant: NISSAN CHEMICAL INDUSTIES, LTD.
    Inventors: Akihiro NAGAYA, Madoka YOSHINO, Hironobu YOSHINO
  • Publication number: 20150266887
    Abstract: The problem of the present invention is to provide a production method for safely synthesizing a nitrogen-containing heterocyclic N-oxide compound in high yield. Another problem of the present invention is to provide a novel N-oxide compound. There is provided a method for producing a nitrogen-containing heterocyclic N-oxide compound of Formula (2), such as 2,2,7,9-tetramethyl-2H-pyrano[2,3-g]quinoline N-oxide, by oxidizing a nitrogen-containing heterocyclic compound of Formula (1), such as 2,2,7,9-tetramethyl-2H-pyrano[2,3-g]quinoline with a persulfate.
    Type: Application
    Filed: September 13, 2013
    Publication date: September 24, 2015
    Inventors: Hironobu Yoshino, Kenichi Seki, Hirohide Kitsuyama, Ikumasa Hidaka
  • Publication number: 20150239899
    Abstract: A method for producing a high-purity nitrogen-containing heterocyclic compound includes: a process (a) and a process (b): (a) a process of mixing a mixture containing a compound and as an impurity compound with a solvent and a metal salt, and (b) a process of obtaining a mixture in a solution state in which the content of the compound has decreased compared to that in the mixture in the process (a) by filtering a mixed solution obtained in the process (a), or a process of obtaining a mixture in which the content of the compound has decreased compared to that in the mixture in the process (a) by further evaporating the solvent or crystallizing following the filtering; (where R1 and R2 are each independently a hydrogen atom, a C1-6 alkyl group, etc., R3 is a hydrogen atom, a C1-6 alkyl group, etc., X is a hydrogen atom, etc.
    Type: Application
    Filed: September 27, 2013
    Publication date: August 27, 2015
    Applicant: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Hirohide Kitsuyama, Akihiro Nagaya, Hironobu Yoshino, Ikumasa Hidaka
  • Publication number: 20150161322
    Abstract: A design support apparatus searches, by using back tracing, for combination of input signals, to be input to an analysis circuit, that causes transition of a level of a signal in an aggressor wire by switching a level of one input signal among input signals that determine a level of a signal in the aggressor wire. The design support apparatus calculates a delay time of a transition path connecting an input terminal of the analysis circuit and an output terminal connected to the aggressor wire. Also, the design support apparatus generates an input vector for shifting, by the delay time, switching of a level of an input signal to be input to a first transition path connected to a first aggressor wire included in the analysis circuit in such a manner that the levels of the signals in the first aggressor wire and a second aggressor wire transition simultaneously.
    Type: Application
    Filed: November 11, 2014
    Publication date: June 11, 2015
    Inventor: Hironobu YOSHINO
  • Patent number: 8429578
    Abstract: A logic verification apparatus for verifying a logic circuit includes a line recognition unit that recognizes signal lines in the circuit based on design information regarding the circuit as a starting point; a decoder recognition unit that recognizes an area including an AND gate that outputs a certain logical value and an inverter as a decoder circuit area based on the design information, and determines a logical value of an input signal inputted to the recognized decoder circuit area when a logical value of the starting point has a specific logical value; and a determination unit that determines whether a logical configuration of the recognized decoder circuit area is correct based on the number of input signals and a combination of logical values of input signals between the recognized decoder circuit areas.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: April 23, 2013
    Assignee: Fujitsu Limited
    Inventor: Hironobu Yoshino
  • Publication number: 20120065910
    Abstract: A resistance value calculating method of a computer calculating a resistance value of a wiring of a semiconductor circuit device, the method includes dividing the wiring into rectangular regions where each of the regions has an orthogonal coordinate system and are mutually not contained, drawing a first line segment up to a front of an edge portion of an overlapped region in which a first divided region and a second divided region overlap in a longitudinal direction of a center portion of the first region, drawing a second line segment in a longitudinal direction of a center portion of the second region after the first line segment is drawn, and calculating a resistance value of the first region and the second region in accordance with a length of each line segment and a width of each region.
    Type: Application
    Filed: September 2, 2011
    Publication date: March 15, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Hironobu YOSHINO
  • Publication number: 20100058264
    Abstract: A logic verification apparatus for verifying a logic circuit includes a line recognition unit that recognizes signal lines in the circuit based on design information regarding the circuit as a starting point; a decoder recognition unit that recognizes an area including an AND gate that outputs a certain logical value and an inverter as a decoder circuit area based on the design information, and determines a logical value of an input signal inputted to the recognized decoder circuit area when a logical value of the starting point has a specific logical value; and a determination unit that determines whether a logical configuration of the recognized decoder circuit area is correct based on the number of input signals and a combination of logical values of input signals between the recognized decoder circuit areas.
    Type: Application
    Filed: August 25, 2009
    Publication date: March 4, 2010
    Applicant: FUJITSU LIMITED
    Inventor: Hironobu YOSHINO