Patents by Inventor Hironoeu Mori

Hironoeu Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050105347
    Abstract: A magnetic storage apparatus provided using ferromagnetic tunnel junction devices is constituted by forming the ferromagnetic tunnel junction device by laminating a fixed magnetization layer and a free magnetization layer on top and back surfaces of a tunnel barrier layer, respectively, wiring word lines in the magnetization direction of the fixed magnetization layer of the ferromagnetic tunnel junction device, and wiring bit lines in the direction orthogonal to the magnetization direction of the fixed magnetization layer of the ferromagnetic tunnel junction device, wherein two different memory states can be written in the ferromagnetic tunnel junction device by inverting the direction of the current flowing through the bit lines. At the time of writing in the ferromagnetic tunnel junction device, the direction of the current flowing through the word line is inverted in the same direction as or the opposite direction to the magnetization direction of the fixed magnetization layer.
    Type: Application
    Filed: February 7, 2003
    Publication date: May 19, 2005
    Applicant: Sony Corporation
    Inventors: Katsutoshi Moriyama, Hironoeu Mori, Nobumichi Okazaki
  • Publication number: 20050077543
    Abstract: The object of the present invention is to provide a composite storage circuit capable of executing a writing operation and reading operation at high speed, and as the result of that, a semiconductor apparatus capable of realizing an instant-on function and an instant-off function is provided. The composite storage circuit is constituted of a volatile storage circuit and a non-volatile storage circuit connected in parallel, and the same information as storage information in the volatile storage circuit is stored in the non-volatile storage circuit. Moreover, as a power supply to the volatile storage circuit decreases, storage information in the volatile storage circuit is written in the non-volatile storage circuit. Further, after a power failure or a decreased power supply, storage information from the non-volatile storage circuit is returned to the volatile storage circuit upon restarting power feeding. Further, a semiconductor apparatus is constituted by having the composite storage circuit described above.
    Type: Application
    Filed: February 7, 2003
    Publication date: April 14, 2005
    Inventors: Katsutoshi Moriyama, Hironoeu Mori, Hisanobu Tsukazaki