Patents by Inventor Hironori Aono

Hironori Aono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7149830
    Abstract: A semiconductor device in which input terminals for external interrupts can be set as desired. A plurality of external input terminals can be specified as interrupt terminals which output an input signal to an external interrupt circuit via an interrupt terminal selector. A selection control circuit specifies whether a plurality of external input terminals are used as interrupt terminals. According to the selection control circuit, the interrupt terminal selector outputs to the external interrupt circuit an input signal entered from an external input terminal which is specified as an interrupt terminal out of the plurality of external input terminals.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: December 12, 2006
    Assignee: Fujitsu Limited
    Inventors: Norihiro Nakatsuhama, Yoshiaki Nagatomi, Kenichi Kawabata, Tomohide Yamamoto, Kenji Nakata, Hironori Aono, Masatoshi Konishi
  • Publication number: 20050188141
    Abstract: A semiconductor device in which input terminals for external interrupts can be set as desired. A plurality of external input terminals can be specified as interrupt terminals which output an input signal to an external interrupt circuit via an interrupt terminal selector. A selection control circuit specifies whether a plurality of external input terminals are used as interrupt terminals. According to the selection control circuit, the interrupt terminal selector outputs to the external interrupt circuit an input signal entered from an external input terminal which is specified as an interrupt terminal out of the plurality of external input terminals.
    Type: Application
    Filed: September 23, 2004
    Publication date: August 25, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Norihiro Nakatsuhama, Yoshiaki Nagatomi, Kenichi Kawabata, Tomohide Yamamoto, Kenji Nakata, Hironori Aono, Masatoshi Konishi
  • Patent number: 5619532
    Abstract: A digital communication system includes a first station, a second station and a network therebetween. The first station includes a clock selecting device for selecting one clock from a plurality of different clocks; and a transmitting device for transmitting frames to the second station based on the selected clock. The second station includes an evaluating device for evaluating transmission quality of data in each of the frames received from the first station; and a quality message inserting device for inserting the evaluated transmission quality as a quality message into a part of the corresponding frame to be transmitted to the first station.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 8, 1997
    Assignee: Fujitsu Limited
    Inventors: Shigeo Tani, Katsuaki Yamanaka, Hironori Aono, Toshiaki Kinoshita