Patents by Inventor Hironori Asai

Hironori Asai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090096361
    Abstract: A luminescent material which is featured in that it exhibits an emission peak at a wavelength ranging from 490 to 580 nm as it is excited by light having a wavelength ranging from 250 to 500 nm and that it has a composition represented by the following general formula (2): (M1-xRx)a2AlSib2Oc2Nd2??(2) (In the general formula (2), M is at least one metallic element excluding Si and Al, R is a luminescence center element, and x, a2, b2, c2 and d2 satisfy the following relationships: 0<x?1, 0.93<a2<1.3, 4.0<b2<5.8 0.6<c2<1, 6<d2<11).
    Type: Application
    Filed: September 10, 2008
    Publication date: April 16, 2009
    Inventors: Yumi Fukuda, Masaaki Tamatani, Hironori Asai, Ryosuke Hiramatsu, Junichi Tatami, Katsutoshi Komeya, Toru Wakihara, Katsuko Tamatani
  • Publication number: 20090072195
    Abstract: A luminescent material is provided, which includes a carbide oxynitride-based compound having a composition represented by formula 1: (M1?wRw)uAl1?xSi1+vOzNtCy??formula 1 wherein M is at least one metal element excluding Si and Al, and R is a luminescent central element. w, u, x, v, z, t and y satisfy following relationships: 0.001<w<0.5; 0.66?u?1; 0.07?x?0.73; 0.06?v?0.84; 0.04?z?0.44; 2.7?t?3.1; and 0.019?y?0.13.
    Type: Application
    Filed: September 17, 2008
    Publication date: March 19, 2009
    Inventors: Yumi FUKUDA, Jun-ichi Tatami, Hironori Asai, Katsutoshi Komeya, Naotoshi Matsuda, Toru Wakihara, Keiko Albessard, Shoko Abe
  • Patent number: 7498736
    Abstract: A luminescent material is provided, which includes a material formed of a single composition containing the main crystal phase and an activator which causes light emission. The material exhibits a narrowband light emission spectrum in a wavelength ranging from 540 nm to 550 nm and a broadband light emission spectrum in a wavelength ranging from 500 nm to 600 nm when the material is excited with light having the main light emission peak having a wavelength ranging from 370 nm to 460 nm.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: March 3, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryosuke Hiramatsu, Masaaki Tamatani, Hironori Asai, Kazuaki Ootsuka
  • Publication number: 20080238298
    Abstract: An image display device is provided, which includes a first substrate having a cold-cathode electron-emission element which emits electrons, and a second substrate which is spaced from and opposed to the first substrate. The second substrate has a transparent substrate, a light-emitting layer provided on the transparent substrate and including phosphor particles containing zinc sulfide as a base material, a boron nitride film disposed on a surface of the light-emitting layer, and an anode applying a voltage to the light-emitting layer.
    Type: Application
    Filed: September 18, 2007
    Publication date: October 2, 2008
    Inventors: Hironori Asai, Iwao Mitsuishi, Naotoshi Matsuda, Keiko Albessard
  • Publication number: 20080018234
    Abstract: A luminescent material is provided, which includes a material formed of a single composition containing the main crystal phase and an activator which causes light emission. The material exhibits a narrowband light emission spectrum in a wavelength ranging from 540 nm to 550 nm and a broadband light emission spectrum in a wavelength ranging from 500 nm to 600 nm when the material is excited with light having the main light emission peak having a wavelength ranging from 370 nm to 460 nm.
    Type: Application
    Filed: January 23, 2007
    Publication date: January 24, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ryosuke Hiramatsu, Masaaki Tamatani, Hironori Asai, Kazuaki Ootsuka
  • Publication number: 20070159058
    Abstract: A phosphor particle includes a phosphor containing zinc sulfide as a base material, and a coating layer applied on the phosphor and made of a magnesium phosphate expressed by Mg3(PO4)2.
    Type: Application
    Filed: December 13, 2006
    Publication date: July 12, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Iwao Mitsuishi, Hironori Asai, Nobuyuki Yokosawa, Masaaki Inamura, Yoshitaka Funayama
  • Publication number: 20060290269
    Abstract: A fluorescent substance is provided, with includes a matrix composed of a compound having an AlN polytypoid structure represented by the following general formula (1), and a luminescence center element: (Al, M)a(N, X)b ??(1) wherein, M is at least one metal excluding Al, X is at least one non-metal excluding N, and a and b are positive values.
    Type: Application
    Filed: May 31, 2006
    Publication date: December 28, 2006
    Inventors: Yumi Fukuda, Masaaki Tamatani, Hironori Asai, Naotoshi Matsuda, Ryosuke Hiramatsu, Keiko Albessard, Jun-ichi Tatami, Katsutoshi Komeya, Tohru Wakihara
  • Patent number: 6881115
    Abstract: There is provided an electron emitting device including a substrate, a pair of electrodes formed on the substrate and being apart from each other, a pair of electrically conductive films formed on the electrodes, respectively, and being apart from each other, a distance between the electrically conductive films being shorter than a distance between the electrodes, and an electron emitting film formed between the electrically conductive films, the electron emitting film containing boron and at least one of carbon and nitrogen.
    Type: Grant
    Filed: September 6, 2001
    Date of Patent: April 19, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiko Yamamoto, Yoshiki Ishizuka, Yumi Fukuda, Hironori Asai, Koji Suzuki
  • Publication number: 20030168958
    Abstract: There is provided an electron emitting device including a substrate, a pair of electrodes formed on the substrate and being apart from each other, a pair of electrically conductive films formed on the electrodes, respectively, and being apart from each other, a distance between the electrically conductive films being shorter than a distance between the electrodes, and an electron emitting film formed between the electrically conductive films, the electron emitting film containing boron and at least one of carbon and nitrogen.
    Type: Application
    Filed: February 7, 2003
    Publication date: September 11, 2003
    Applicant: KABUSHHIKI KAISHA TOSHIBA
    Inventors: Masahiko Yamamoto, Yoshiki Ishizuka, Yumi Fukuda, Hironori Asai, Koji Suzuki
  • Patent number: 6445124
    Abstract: A field emission device essentially consists of three electrodes, and comprises a cathode on the surface of which an emissive material is formed, a gate electrode formed on an insulation layer formed to upwardly surround the cathode, and having an opening for passing electrons emitted from the emissive material, and an anode for accelerating the electrons passing through the opening, wherein L/S is one or above, where S represents an aperture diameter of the opening, and L represents a typical shortest distance that the electrons emitted from the emissive material take to pass through the insulation layer surrounding the cathode. Based on this structure, it is possible to provide a field emission device that can control the orbit of emitted electrons while employing a simple three-electrode structure.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: September 3, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hironori Asai, Masahiko Yamamoto, Koji Suzuki
  • Publication number: 20020057046
    Abstract: There is provided an electron emitting device including a substrate, a pair of electrodes formed on the substrate and being apart from each other, a pair of electrically conductive films formed on the electrodes, respectively, and being apart from each other, a distance between the electrically conductive films being shorter than a distance between the electrodes, and an electron emitting film formed between the electrically conductive films, the electron emitting film containing boron and at least one of carbon and nitrogen.
    Type: Application
    Filed: September 6, 2001
    Publication date: May 16, 2002
    Inventors: Masahiko Yamamoto, Yoshiki Ishizuka, Yumi Fukuda, Hironori Asai, Koji Suzuki
  • Patent number: 6046499
    Abstract: Disclosed is a semiconductor package having: a semiconductor chip; a package substrate; a wire connected to the semiconductor chip; and an electric connection member formed on the package substrate to electrically connect the wire to a printed board when the package substrate is mounted on the printed board. One surface of the package substrate has a first area in which the semiconductor chip is mounted and a second area in which the wire are arranged, and the other surface has a third area which is located in the rear of the second area and in which the electric connection member connects the wire to the printed board and a fourth area which is located in the rear of the first area. A heat-transfer member is provided in the fourth area and transmits heat generated by the semiconductor chip to the printed board through the package substrate.
    Type: Grant
    Filed: March 26, 1997
    Date of Patent: April 4, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Keiichi Yano, Hironori Asai
  • Patent number: 5969413
    Abstract: A semiconductor chip is supported on a tape carrier provided with lead wirings. The semiconductor chip is electrically connected to the lead wirings. The semiconductor chip of this quality is bonded in combination with the pe carrier to an aluminum nitride substrate. The lead wirings provided on the carrier combine the two functions as an internal lead and an external lead. The semiconductor package of such a structure as is described above allows multi-terminal connection by the narrowing of pitches between the leads and permits provision of a miniature package excelling in the heat-radiating property. Alternatively, the lead wirings supported on the tape carrier and electrically connected to the semiconductor chip are utilized as internal leads. For the external leads, such lead frames as are bonded to the aluminum nitride substrate are used. The lead frames are electrically connected to the internal leads provided in the tape carrier.
    Type: Grant
    Filed: May 14, 1997
    Date of Patent: October 19, 1999
    Assignee: Kabushiki Kaishi Toshiba
    Inventors: Keiichi Yano, Kazuo Kimura, Hironori Asai, Jun Monma, Koji Yamakawa, Mitsuyoshi Endo, Hirohisa Osoguchi
  • Patent number: 5928769
    Abstract: This invention provides an aluminum nitride wiring substrate in which a wiring metal layer for forming a signal wiring layer is densified to micropattern a signal wiring portion of an aluminum nitride package incorporating a semiconductor element therein and to increase the signal processing speed of the semiconductor element itself, the electric resistance of the wiring metal layer is reduced while keeping high thermal conductivity and insulating characteristics inherent in the aluminum nitride material to make it possible to mount a high-speed and high-output semiconductor element, and the wiring metal layer is prevented from defective wire continuity, odd appearance, or etc, and a method for the production thereof.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: July 27, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jun Monma, Hironori Asai
  • Patent number: 5909058
    Abstract: A thin type semiconductor package having a low thermal resistance and a low electric resistance is disclosed, that comprises a nitride ceramic supporting substrate having a first main surface and a second main surface, the nitride ceramic supporting substrate having via-holes that pass through from the first main surface to the second main surface, a resin film having a wiring layer, the resin film being bonded to the first main surface of the supporting substrate, the wiring layer being electrically connected to an edge portion of the via-holes on the first main surface, the resin film having an opening region, a semiconductor chip directly mounted on the first main surface of the nitride ceramic supporting substrate, disposed at the opening region of the resin film, and electrically connected to the wiring layer of the resin film, and external connection terminals disposed on the edge portion of the via-holes of the second main surface.
    Type: Grant
    Filed: September 22, 1997
    Date of Patent: June 1, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Keiichi Yano, Hironori Asai, Kaoru Koiwa, Nobuo Iwase
  • Patent number: 5736790
    Abstract: Disclosed is a bump formed on a pad which is provided on either a semiconductor chip or a package or a wiring substrate for input or output thereof, for making electric connection on the pad. The bump has: a projection projecting from the pad; a ball having conductivity and located above the pad; and a conductive bonding material for bonding the pad for and the ball, wherein creep strength of the ball is larger than strength of the conductive bonding material. With another conductive bonding material provided on the other pad of a wiring substrate or a package, the ball of the bump of the semiconductor chip or the package is placed close to another pad of the wiring substrate or package. The conductive bonding material of the other pad is heated and melted to connect the ball and the other pad of the wiring substrate or package by the conductive bonding material.
    Type: Grant
    Filed: September 20, 1996
    Date of Patent: April 7, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kiyoshi Iyogi, Kaoru Koiwa, Keiichi Yano, Hironori Asai
  • Patent number: 5703397
    Abstract: A semiconductor ceramic multilayer package comprising an aluminum nitride substrate having a semiconductor element mounted on one surface thereof and a wiring pattern electrically connected to the semiconductor element, connecting terminals connected to the wiring pattern and disposed on the other surface of the aluminum nitride substrate, and a sealing member connected to the aluminum nitride substrate with a metallic bonding layer or a glass layer having a thickness of not more than 100 .mu.m in such a manner as to seal the semiconductor element possesses a notably improved heat-radiating property and accomplishes the object of increasing the number of pins and reducing the size of package.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: December 30, 1997
    Inventors: Mitsuyoshi Endo, Hironori Asai, Keiichi Yano, Yoshitoshi Sato
  • Patent number: 5637406
    Abstract: An aluminum nitride substrate where an electroconductive metallized layer is formed on a ceramic substrate comprising a sintered substance of aluminum nitride with a high thermal conductivity for example 200 W/m.multidot.K. The sintered substance of aluminum nitride contains a proper amount of a sintering assistance agent component. The density on the surface of an intergranular phase component mainly comprising the sintering assistance agent component is 3 weight % or less. The metallized layer formed on the sintered substance of aluminum nitride defining the density of the intergranular phase component on the surface of the sintered substance has an excellent bonding strength against the sintered substance of aluminum nitride, the bonding strength being nearly stable.
    Type: Grant
    Filed: March 23, 1992
    Date of Patent: June 10, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hironori Asai, Yasuyuki Sugiura
  • Patent number: 5063121
    Abstract: Disclosed is:i) a nitride type ceramic substrate comprises; a nitride type ceramic sintered sheet; a conductive metallized layer formed on the nitride type ceramic sintered sheet; and a layer of a compound containing yttria and alumina, present in the vicinity of the interface between the nitride type ceramic sintered sheet and the metallized layer;ii) a circuit substrate comprises; a substrate comprising a nitride type ceramic sintered sheet; a metallized layer comprising molybdenum and tungsten as a main component and an activation metal added thereto formed on the substrate; and a layer of a compound containing yttria and alumina, present inside of the metallized layer and in the vicinty of the interface between the substrate and the metallized layer;iii) a surface conductive ceramic substrate which is characterized by comprising; a nitride type ceramic substrate; and a conductive metallized layer chiefly comprised of at least one of Mo and W, a group IVa active metal element and a fourth period transition
    Type: Grant
    Filed: September 22, 1989
    Date of Patent: November 5, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideki Sato, Nobuyuki Mizunoya, Hironori Asai, Kazuo Anzai, Tsuyoshi Hatano
  • Patent number: 4883704
    Abstract: One aspect of the present invention is directed to an aluminum nitride ceramic substrate which comprises an aluminum nitride ceramic sheet and a conductive metallized layer formed thereon. The metallized layer comprises molybdenum and/or tungsten and contains a compound containing yttria and alumina in the vicinity of the interface between the aluminum nitride ceramic sintered sheet and the conductive metallized layer.
    Type: Grant
    Filed: March 29, 1988
    Date of Patent: November 28, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideki Sato, Nobuyuki Mizunoya, Hironori Asai, Kazuo Anzai, Tsuyoshi Hatano