Abstract: A semiconductor device capable of reducing in size thereof and suppressing degradation in the characteristics of circuit components is provided. The semiconductor device includes an LC circuit comprised of a spiral inductor provided over a semiconductor substrate and a capacitive element coupled with the spiral inductor. The spiral inductor includes a central area encircled with a metal wiring and a peripheral area other than the central area. The capacitive element is formed in an upper-layer or a lower-layer position corresponding to the peripheral area other than the central area.

Abstract: A semiconductor device capable of reducing in size thereof and suppressing degradation in the characteristics of circuit components is provided. The semiconductor device includes an LC circuit comprised of a spiral inductor provided over a semiconductor substrate and a capacitive element coupled with the spiral inductor. The spiral inductor includes a central area encircled with a metal wiring and a peripheral area other than the central area. The capacitive element is formed in an upper-layer or a lower-layer position corresponding to the peripheral area other than the central area.

Abstract: A relationship between distance from a back bias control section which outputs a control signal for controlling a back bias of a transistor and an amount of noise in the control signal outputted from the back bias control section is found. An increase of jitter corresponding to the amount of the noise in a clock transmitted on a clock path connected to a circuit section (IP macro) is found on the basis of the relationship between the distance from the back bias control section and the amount of the noise. The circuit section and the clock path are placed on the basis of the increase of the jitter and an allowable jitter value for the circuit section.

Abstract: A relationship between distance from a back bias control section which outputs a control signal for controlling a back bias of a transistor and an amount of noise in the control signal outputted from the back bias control section is found. An increase of jitter corresponding to the amount of the noise in a clock transmitted on a clock path connected to a circuit section (IP macro) is found on the basis of the relationship between the distance from the back bias control section and the amount of the noise. The circuit section and the clock path are placed on the basis of the increase of the jitter and an allowable jitter value for the circuit section.

Abstract: An object of the present invention is to provide a process for preparing a high-quality coated paper with high runnability while preventing damage to the elastic roll surface of the soft calender encountered during high-speed operation. The present invention provides a process for preparing a coated paper, comprising the steps of: making a base paper; applying a coating solution containing a pigment and an adhesive on the base paper to form one or more pigment coating layers; and surface-treating the pigment coating layers by a soft calender, said papermaking and coating steps being performed at an operating speed of 1300 m/min; wherein said surface-treating step comprises treating the outermost one of the pigment coating layers using a soft calender comprising a metallic roll and an elastic roll with at least two or more nips and wherein the elastic roll has a Shore D hardness of 90-96 and the metallic roll surface temperature at the first nip is less than 130° C.