Patents by Inventor Hironori Miyake

Hironori Miyake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Voltage comparator with sample hold circuit
    Patent number: 5165058
    Abstract: A chopper type voltage comparator, as used in analog-to-digital converters, includes an inverter with a switch coupled between the output and an input node and a capacitor coupling the input node to a comparator input node. A signal input terminal and at least one reference voltage input terminal are connected to the comparator input terminal by alternately operated switches. A sample hold circuit is connected to the comparator input node to overcome the effects of the switches on the reference voltage.
    Type: Grant
    Filed: July 5, 1990
    Date of Patent: November 17, 1992
    Assignee: Motorola, Inc.
    Inventors: Yuuichi Nakatani, Hironori Miyake
  • Subranging ADC with error correction through increased fine step span and noise reducing layout
    Patent number: 5099240
    Abstract: A multiple-clock-cycle subranging type A/D converter utilizing sufficient fine steps in the LSB identification to cover two complete coarse steps so that there are no gaps in the fine steps and no potential errors. Also, two LSB encoders can be utilized, one during each clock cycle, to increase the speed of the A/D converter. The components of the A/D converter are positioned on a semiconductor chip so that noise from electronic switches is not introduced into the reference voltage ladder.
    Type: Grant
    Filed: September 17, 1990
    Date of Patent: March 24, 1992
    Assignee: Motorola Inc.
    Inventors: Yuuichi Nakatani, Hironori Miyake