Patents by Inventor Hironori Nakamura

Hironori Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190294384
    Abstract: According to an embodiment of this invention, an image processing apparatus generates image data to be used to print an image on a print medium, based on a print job transmitted from a host, generates first print data by performing image processing on part of the generated image data, stores the first print data in a first memory, generates second print data by performing image processing on a remaining part of the generated image data, and stores the second print data in a second memory. The apparatus further transfers the first print data from the first memory to the second memory, composes the first print data and the second print data stored in the second memory, and transfers the composite data as print data to a continuous area of a third memory.
    Type: Application
    Filed: March 18, 2019
    Publication date: September 26, 2019
    Inventor: Hironori Nakamura
  • Patent number: 10377439
    Abstract: A motorcycle includes a main frame, a seat frame connected to a rear portion of the main frame and extending backward to support a seat, an auxiliary frame reinforcing the seat frame, and an acceleration sensor. The acceleration sensor is supported at a position under the seat frame and above the auxiliary frame in a side view by a bracket extending from the seat frame or the auxiliary frame. Side surfaces of the acceleration sensor are covered with a vehicle body cover.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: August 13, 2019
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Hironori Nakamura, Kyosuke Inada, Tatsuya Seiji, Shohei Miura, Masato Niki
  • Publication number: 20190082073
    Abstract: An object of the present invention is to cause a plurality of image processing controllers to operate in parallel without idling them. The present invention is an image processing apparatus that processes data made use of for printing an image by relatively moving a printing unit including a plurality of ink ejection ports arranged in a first direction and a printing medium in a second direction that intersects with the first direction, the image processing apparatus including: an acquisition unit configured to acquire image data corresponding to one page; a plurality of processing units; and a transmission unit configured to perform repetitive transmission processing that repeats transmission of image data acquired by the acquisition unit in order to each of the plurality of image processing units by taking band data as a unit.
    Type: Application
    Filed: September 6, 2018
    Publication date: March 14, 2019
    Inventor: Hironori Nakamura
  • Publication number: 20180339745
    Abstract: A motorcycle includes a main frame, a seat frame connected to a rear portion of the main frame and extending backward to support a seat, an auxiliary frame reinforcing the seat frame, and an acceleration sensor. The acceleration sensor is supported at a position under the seat frame and above the auxiliary frame in a side view by a bracket extending from the seat frame or the auxiliary frame. Side surfaces of the acceleration sensor are covered with a vehicle body cover.
    Type: Application
    Filed: August 2, 2018
    Publication date: November 29, 2018
    Inventors: Hironori Nakamura, Kyosuke Inada, Tatsuya Seiji, Shohei Miura, Masato Niki
  • Publication number: 20180079202
    Abstract: According to an embodiment of this invention, a print control apparatus which controls a printhead, including a plurality of nozzle arrays each formed from a plurality of nozzles for discharging ink, for executing printing on a print medium by discharging inks of a plurality of colors from the plurality of nozzle arrays executes the following data processing. That is, image data is received from an external apparatus. One of a plurality of ASICs executes at least common data processing for generating print data corresponding to the plurality of colors with respect to the received image data, and another ASIC executes specific data processing related to each of the plurality of colors. Thus, print data to be output to the printhead is generated, and then transmitted to the printhead.
    Type: Application
    Filed: November 30, 2017
    Publication date: March 22, 2018
    Inventor: Hironori Nakamura
  • Patent number: 9868279
    Abstract: According to an embodiment of this invention, a print control apparatus which controls a printhead, including a plurality of nozzle arrays each formed from a plurality of nozzles for discharging ink, for executing printing on a print medium by discharging inks of a plurality of colors from the plurality of nozzle arrays executes the following data processing. That is, image data is received from an external apparatus. One of a plurality of ASICs executes at least common data processing for generating print data corresponding to the plurality of colors with respect to the received image data, and another ASIC executes specific data processing related to each of the plurality of colors. Thus, print data to be output to the printhead is generated, and then transmitted to the printhead.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: January 16, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hironori Nakamura
  • Publication number: 20170087823
    Abstract: According to an embodiment of this invention, a print control apparatus which controls a printhead, including a plurality of nozzle arrays each formed from a plurality of nozzles for discharging ink, for executing printing on a print medium by discharging inks of a plurality of colors from the plurality of nozzle arrays executes the following data processing. That is, image data is received from an external apparatus. One of a plurality of ASICs executes at least common data processing for generating print data corresponding to the plurality of colors with respect to the received image data, and another ASIC executes specific data processing related to each of the plurality of colors. Thus, print data to be output to the printhead is generated, and then transmitted to the printhead.
    Type: Application
    Filed: September 9, 2016
    Publication date: March 30, 2017
    Inventor: Hironori Nakamura
  • Patent number: 9036197
    Abstract: In order to control transfer to a processing unit of input data containing a plurality of lines stored across a plurality of memory regions including first and second memory regions, a position of a line of target of output data containing a plurality of lines output from the processing unit is specified. A number of lines of input data to be transferred from the first memory region and their addresses are determined, and a number of lines of input data to be transferred from the second memory region and their addresses are determined, based on the specified position of the line of target. Control is performed based on the determination result such that input data for a number of lines may be transferred from the first memory region and input data for a number of lines may be transferred from the second memory region.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: May 19, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hironori Nakamura
  • Patent number: 9030713
    Abstract: Provided is a data processing method that is capable of high-speed processing without using a large cache memory, while correlating 2-dimensional parameters with a plurality of data without damaging the arrangement rule. Therefore, when there is a continuing M-line parameter after a previously read M-line parameter in a 2-dimensional table that is stored in an external memory 406, the contents of the cache memory 404 are updated with this continuing M-line parameter as the new parameter. When there is no continuing M-line parameter after the previously read M-line parameter in the 2-dimensional table, the contents of the cache memory 404 are updated with the continuing M-line parameter after returning to the starting line of the 2-dimensional table as the new parameter. Such an update rule is maintained even when the band, which is the processing unit, is changed, or even in the progress of band processing.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: May 12, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hironori Nakamura
  • Patent number: 8955633
    Abstract: A two-wheeled motor vehicle has a rear cushion unit that includes a damper cylinder having one end part linked to a swing arm, a sub-tank connected to the damper cylinder and an adjustment mechanism for adjusting a damping force in response to operation of the operation element is provided between a vehicle body frame and the swing arm. A cylinder body of the damper cylinder, a bottomed housing tube part housing the adjustment mechanism having on an upper end part an operation face on which the operation element is disposed, and the sub-tank are integrally and connectedly provided. The operation face is inclined obliquely upward so that the operation element that faces a region bounded by the seat frame, the pillion step holder mounted on the seat frame and the swing arm when viewed from the side can be operated from obliquely above on the outside.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: February 17, 2015
    Assignee: Honda Motor Co., Ltd.
    Inventors: Hironori Nakamura, Taisuke Nimura, Akihiro Nakajima
  • Publication number: 20150022860
    Abstract: In order to control transfer to a processing unit of input data containing a plurality of lines stored across a plurality of memory regions including first and second memory regions, a position of a line of target of output data containing a plurality of lines output from the processing unit is specified. A number of lines of input data to be transferred from the first memory region and their addresses are determined, and a number of lines of input data to be transferred from the second memory region and their addresses are determined, based on the specified position of the line of target. Control is performed based on the determination result such that input data for a number of lines may be transferred from the first memory region and input data for a number of lines may be transferred from the second memory region.
    Type: Application
    Filed: July 14, 2014
    Publication date: January 22, 2015
    Inventor: Hironori Nakamura
  • Patent number: 8796860
    Abstract: A semiconductor device includes a substrate, a multi-layer wiring layer formed on the substrate, and including a signal line and ground lines extending above the signal line, one of the ground lines extending toward a direction in a layer and another one of the ground lines extending from the one of the ground lines toward another direction in the layer, a first pad on the multi-layer wiring layer, and a redistribution layer formed on the multi-layer wiring layer, including a second pad, a redistribution line coupling the first pad and the second pad, and an insulation film covering the redistribution line.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: August 5, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Yuji Tada, Tsuyoshi Hirakawa, Hironori Nakamura, Takayuki Kurokawa
  • Publication number: 20140084565
    Abstract: A two-wheeled motor vehicle has a rear cushion unit that includes a damper cylinder having one end part linked to a swing arm, a sub-tank connected to the damper cylinder and an adjustment mechanism for adjusting a damping force in response to operation of the operation element is provided between a vehicle body frame and the swing arm. A cylinder body of the damper cylinder, a bottomed housing tube part housing the adjustment mechanism having on an upper end part an operation face on which the operation element is disposed, and the sub-tank are integrally and connectedly provided. The operation face is inclined obliquely upward so that the operation element that faces a region bounded by the seat frame, the pillion step holder mounted on the seat frame and the swing arm when viewed from the side can be operated from obliquely above on the outside.
    Type: Application
    Filed: May 25, 2012
    Publication date: March 27, 2014
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Hironori Nakamura, Taisuke Nimura, Akihiro Nakajima
  • Patent number: 8477397
    Abstract: A channel selection section selects whether the subsequent processing to the image data is executed by image distribution precedence processing or by gradation lowering precedence processing in accordance with channel information of the image data. That is, in regard to the channels of C, M and K with relatively high density among inks, the image distribution precedence processing excellent in robustness is selected. On the other hand, in the ink of the color with high brightness or low density, even if the print position of the dot is shifted, the density change due to this shift is not so much large. It is possible to restrict an increase in the processing load due to executing the gradation lowering processing after the distribution processing to each of the plural divided images by thus not selecting the image distribution precedence processing in consideration of the robustness.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: July 2, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hironori Nakamura, Hiroki Horikoshi, Yasunori Fujimoto, Shinichi Miyazaki, Akira Ichimura
  • Patent number: 8462387
    Abstract: Multi-valued image data stored in an input image buffer are read out for each time of scans, and the color space conversion and image distribution are performed to read multi-valued image data. The binarized result is sent to the print buffer and at the same time, is accumulated as the print information to execute processing of reflecting it to the image distribution processing of the next pass. It is possible to appropriately restrict the density fluctuation due to the print position shift between planes without providing pixels where dots are overlapped and printed more than necessary. With this, by accumulating the multi-valued image data at the stage of RGB in the input image buffer to read out data stored in input image buffer for executing processing, a capacity required for input image buffer does not change even if the number of the ink colors provided on the printing apparatus increases.
    Type: Grant
    Filed: January 4, 2010
    Date of Patent: June 11, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shigeru Fujita, Akira Ichimura, Yasunori Fujimoto, Shinichi Miyazaki, Hironori Nakamura
  • Patent number: 8436469
    Abstract: A semiconductor device, includes a substrate, a multi-layer wiring layer formed on the substrate, and including a signal line and ground lines extending above the signal line, one of the ground lines extending toward a direction in a predetermined layer and another one of the ground lines extending from the one of the ground lines toward another direction in the predetermined layer, a first pad on the multi-layer wiring layer, a redistribution layer formed on the multi-layer wiring layer, including a second pad, a redistribution line coupling the first and second pads, and an insulation film covering the redistribution line, the redistribution line extending above the ground lines along the one of the ground lines and not extending along the another one of the ground lines. The insulation film includes a hole exposing the second pad above an end portion of the one of the ground lines.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: May 7, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Yuji Tada, Tsuyoshi Hirakawa, Hironori Nakamura, Takayuki Kurokawa
  • Patent number: 8405219
    Abstract: A semiconductor device, includes a substrate, a multi-layer wiring layer formed on the substrate, and including a signal line and ground lines extending above the signal line, one of the ground lines extending toward a direction in a predetermined layer and another one of the ground lines extending from the one of the ground lines toward another direction in the predetermined layer, a first pad on the multi-layer wiring layer, a redistribution layer formed on the multi-layer wiring layer, including a second pad, a redistribution line coupling the first and second pads, and an insulation film covering the redistribution line, the redistribution line extending above the ground lines along the one of the ground lines and not extending along the another one of the ground lines. The insulation film includes a hole exposing the second pad above an end portion of the one of the ground lines.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: March 26, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Yuji Tada, Tsuyoshi Hirakawa, Hironori Nakamura, Takayuki Kurokawa
  • Patent number: 8289041
    Abstract: A semiconductor integrated circuit device includes a first chip including an internal circuit, and a second chip capable of being accessed only via the first chip, and a test processor circuit electrically connected internally via the first chip, for accessing the second chip from an external terminal and testing the second chip, and a test circuit where an input/output buffer is installed for signals for accessing the second chip within the test processor circuit, and a bypass line installed for transferring signals from the first chip to the second chip and avoiding the input/output buffer within the test processor circuit, and a switch which switches between signal transfer path via the input/output buffer, and a signal transfer path via the bypass line.
    Type: Grant
    Filed: December 15, 2008
    Date of Patent: October 16, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kazunori Yamane, Takayuki Kurokawa, Yuji Tada, Hironori Nakamura, Manabu Kitabatake
  • Publication number: 20120241971
    Abstract: A semiconductor device, includes a substrate, a multi-layer wiring layer formed on the substrate, and including a signal line and ground lines extending above the signal line, one of the ground lines extending toward a direction in a predetermined layer and another one of the ground lines extending from the one of the ground lines toward another direction in the predetermined layer, a first pad on the multi-layer wiring layer, a redistribution layer formed on the multi-layer wiring layer, including a second pad, a redistribution line coupling the first and second pads, and an insulation film covering the redistribution line, the redistribution line extending above the ground lines along the one of the ground lines and not extending along the another one of the ground lines. The insulation film includes a hole exposing the second pad above an end portion of the one of the ground lines.
    Type: Application
    Filed: June 7, 2012
    Publication date: September 27, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Yuji Tada, Tsuyoshi HIRAKAWA, Hironori NAKAMURA, Takayuki KUROKAWA
  • Patent number: 8237287
    Abstract: A semiconductor device includes a substrate over which a circuit is formed, a multi-layer wiring layer having a plurality of wiring layers formed over the substrate and a pad formed in a predetermined location of an uppermost layer of the wiring layers, a new pad provided in an appropriate location over the multi-layer wiring layer, and a redistribution layer provided with a redistribution line coupling the new pad and the pad. In the semiconductor device: the multi-layer wiring layer includes a signal line for transmitting an electric signal to the circuit and a ground line provided in a wiring layer between the redistribution line or the new pad and the circuit; the ground line is formed to correspond to a location where the new pad is assumed to be located and a route along which the redistribution line is assumed to be formed; and the redistribution line is formed along at least a portion of the ground line.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: August 7, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Yuji Tada, Tsuyoshi Hirakawa, Hironori Nakamura, Takayuki Kurokawa