Abstract: A random number generation circuit in an embodiment includes a sampling circuit configured to capture an oscillation output of a ring oscillator using a first clock and generate a random number value, a periodicity detection circuit configured to detect periodicity of an output of the sampling circuit, a randomness test circuit configured to perform a randomness test for the output of the sampling circuit, and a control circuit configured to change an oscillation period of the oscillation output based on a detection result of the periodicity detection circuit, divide a random number output based on the random number value into a plurality of divided random numbers to perform random number generation for each of the divided random numbers, and cause the randomness test circuit to execute the randomness test for each generation of the divided random numbers.

Abstract: Disclosed is a bag comprising a bag-shaped container body which is made of a flexible film, and a spout tube which allows the inside of the container body to communicate with the outside the container body, wherein the container body comprises: a cylindrical barrel portion; a first sealing part which is formed at a lower end of the barrel portion by matching and sealing together inner surfaces of the film constituting the container body; and a flat bottom face part including an upper end edge of the first sealing part; wherein the spout tube is interposed between the films that are matched at the first sealing part of the bottom face part; and wherein the first sealing part and the spout tube are disposed in a plane which is approximately parallel to the flat bottom face part.

Abstract: According to one embodiment, a semiconductor integrated circuit device includes a non-volatile memory, a storing module, and a processing module. The non-volatile memory is having a first area and a second area. The storing module is configured to store a second program for downloading a first program from an outside to the first area. The processing module is configured to execute the first and the second programs. The non-volatile memory is having a first area and a second area. The storing module is configured to store a second program for downloading a first program from an outside to the first area. The processing module is configured to execute the first and the second programs. The first area is capable of being written and erased by the first program, and the second area is not capable of being erased by the first program.

Abstract: According to one embodiment, a semiconductor integrated circuit device includes a non-volatile memory, a storing module, and a processing module. The non-volatile memory is having a first area and a second area. The storing module is configured to store a second program for downloading a first program from an outside to the first area. The processing module is configured to execute the first and the second programs. The non-volatile memory is having a first area and a second area. The storing module is configured to store a second program for downloading a first program from an outside to the first area. The processing module is configured to execute the first and the second programs. The first area is capable of being written and erased by the first program, and the second area is not capable of being erased by the first program.

Abstract: A CPU and a memory are connected to each other through an address bus, a data bus, a read signal line and a write signal line. A read control signal and a write control signal transferred to the read signal line and the write signal line, respectively, are supplied to a control signal generating circuit. The control signal generating circuit detects a change in the read control signal and the write control signal transmitted to the read signal line and the write signal line, respectively, and then generates a control signal. The control signal generated by the control signal generating circuit is supplied to a pseudo-data generating circuit. The pseudo-data generating circuit generates pseudo-data comprising any random number data in accordance with the control signal and outputs the pseudo-data onto the data bus.

Abstract: A semiconductor storage device includes an arithmetic operation unit configured to perform an arithmetic operation of generating a different error detecting code depending on the information of a memory address, using the data and the information of the memory address in a memory cell into which the data is written, and a storage unit configured to store the data and the error detecting code in the memory cell.

Abstract: A semiconductor storage device includes: a memory configured to store data at a first address and store an error detecting code corresponding to the data at a second address which is set up in a predetermined relation with the first address and different from the first address; and an address storage portion configured to store information on address relation between the first address and the second address.

Abstract: When a reset signal /RESET is “L”, a flip-flop circuit holds “1”; on the other hand, a flip-flop circuit holds “0”. When the reset signal /RESET becomes “H”, the flip-flop circuits captures data in synchronous with a clock signal. When a power supply voltage returns to the initial value after an instantaneous blackout occurs, the data of the flip-flop circuits have the same value. An output signal of an exclusive-OR gate circuit becomes “L”, the output is held in a flip-flop circuit. As a result, an instantaneous blackout detection signal becomes “H”.

Abstract: A semiconductor circuit having a power supply voltage detection circuit to detect a potential level of an external power supply voltage and to output a detection signal depending on a comparison result with the potential level. A system control circuit detects the detection signal, outputs a status signal and an interrupt signal, and outputs a clock selection signal in response to an operation control signal. A CPU outputs the operation control signal to the system control circuit in response to the status signal and the interrupt signal. A clock generation circuit generates a plurality of clock signals and a clock selection circuit selects one clock signal among the plurality of clock signals in response to the clock selection signal. The clock selection circuit then outputs the one clock signal as a system clock signal.

Abstract: When a reset signal /RESET is “L”, a flip-flop circuit holds “1”; on the other hand, a flip-flop circuit holds “0”. When the reset signal /RESET becomes “H”, the flip-flop circuits captures data in synchronous with a clock signal. When a power supply voltage returns to the initial value after an instantaneous blackout occurs, the data of the flip-flop circuits have the same value. An output signal of an exclusive-OR gate circuit becomes “L”, the output is held in a flip-flop circuit. As a result, an instantaneous blackout detection signal becomes “H”.

Abstract: A security card 20 including a CPU 1 for executing instruction sequences such as a password verifying routine, a memory 2 configured to store secret data such as the password and so forth, a random signal generation circuit 4 configured to generate a wait signal which is output in order to halt the operation of the CPU 1. When the wait signal is input, the CPU 1 halts its operation for a short time such as one to several clocks. In accordance with the security card 20, the operation of the CPU 1 can be deferred for a short time in an arbitrary timing in order to make it difficult to analyze the operation of the CPU 1.

Abstract: A semiconductor circuit having a power supply voltage detection circuit to detect a potential level of an external power supply voltage and to output a detection signal depending on a comparison result with the potential level. A system control circuit detects the detection signal, outputs a status signal and an interrupt signal, and outputs a clock selection signal in response to an operation control signal. A CPU outputs the operation control signal to the system control circuit in response to the status signal and the interrupt signal. A clock generation circuit generates a plurality of clock signals and a clock selection circuit selects one clock signal among the plurality of clock signals in response to the clock selection signal. The clock selection circuit then outputs the one clock signal as a system clock signal.

Abstract: A date-displaying endless sheet has thirty-one dates consecutively carried thereon in a machine direction of the sheet. A day-displaying endless sheet has days of the week consecutively placed thereon in a machine direction of the sheet. A first pair of inserting rollers is rotated to feed the date-displaying sheet to an extent that displays the following date, while a second pair of ejecting rollers is rotated to feed the day-displaying sheet to a level that displays the following day of the week. The above-structured daily calendar is semi-permanently operable without the need for calendar sheet replacement as opposed to prior art reel type calendars.

Abstract: A CPU and a memory are connected to each other through an address bus, a data bus, a read signal line and a write signal line. A read control signal and a write control signal transferred to the read signal line and the write signal line, respectively, are supplied to a control signal generating circuit. The control signal generating circuit detects a change in the read control signal and the write control signal transmitted to the read signal line and the write signal line, respectively, and then generates a control signal. The control signal generated by the control signal generating circuit is supplied to a pseudo-data generating circuit. The pseudo-data generating circuit generates pseudo-data comprising any random number data in accordance with the control signal and outputs the pseudo-data onto the data bus.

Abstract: A portable electronic device has contacting and noncontacting interfaces and an inhibiting section. The contacting interface including a plurality of contact terminals for exchanging driving power and data. The noncontacting interface for generating driving power and demodulating received data from a signal received via an antenna. The inhibiting section for inhibiting an operation of the other one of the contacting and noncontacting interfaces while the portable electronic device is driven via one of the contacting and noncontacting interfaces.

Abstract: An IC card according to the present invention includes a communication section for receiving externally transmitted data, a storage section for storing a file and definition information of the file, and a delete section for, when the data received through the communication section is a command to delete a predetermined file, deleting the predetermined file and definition information of the predetermined file from the storage section.

Abstract: Disclosed is a method for the evaluation of the virus-removing capability of a porous polymeric membrane module for removing viruses by filtration, which comprises testing I in which a transmembrane pressure lowering from predetermined value Ph a predetermined period of time after the termination of the supply of a gas is measured with respect to the porous polymeric membrane module, wherein the value Ph satisfies the formula: d<Ph<c, wherein d and c are respectively the transmembrane pressures at points (d) and (c) in FIG. 1 hereof. By the method of the present invention, it has become possible for the first time to effectively and efficiency select a module which can be suitably used for removing viruses from a virus-containing fluid and to obtain to fluid substantially free of the virus.

Abstract: A blood-purifying regenerated cellulose membrane, in which the occurrence of the leukopenia phenomenon and the activation of the complement system are moderated, is prepared by applying a solution of a polymeric substance comprising as one component units derived from one or more basic vinyl monomers having an amino group in the side chain in an organic solvent to a regenerated cellulose membrane, removing the excessive solution, and then fixing the polymeric substance to the regenerated cellulose membrane.

Abstract: A lens tube guide frame holds a retractable lens tube in the body of the camera and also holds a lens and a film surface in their respective correct positions for making exposures. The lens tube guide frame can be easily inserted in the body of the camera and includes a standard surface at its front inner wall opposite the open side of the lens tube guide frame to provide an exact stop for forward movement of the lens tube. The guide frame cross section is U-shaped or box-shaped, and has two projection portions directed outwards at the open rear end to engage adjacent side walls of the camera body. The lens tube guide frame, with the lens tube already in it, is inserted into the camera body through the back side when assembling, whereby the lens tube guide frame can be positioned without any adjustment.

Abstract: A flash emitter is automatically actuated upon releasing the shutter when the brightness of an object to be photographed is below a predetermined level. Upon the flashwise photographing, the diaphragm aperture is also automatically controlled in accordance with the distance between the camera and the object.BACKGROUND OF THE INVENTIONThis invention relates to shutters for photographic cameras with a flash equipment and more particularly it is concerned with a shutter of the type described in which a flash emitter is automatically actuated upon releasing the shutter when the brightness of an object to be photographed is below a predetermined level.SUMMARY OF THE INVENTIONThe present invention has as its object the provision of a shutter for photographic cameras with a flash equipment in which a flash emitter is automatically actuated, upon releasing the shutter, when the brightness of an object to be photographed is below a predetermined level.