Abstract: Disclosed herein is a semiconductor memory including: a first MOS transistor having two diffusion layers formed in a semiconductor substrate; a second MOS transistor which is formed in the semiconductor substrate and has one of the two diffusion layers of the first MOS transistor as a common diffusion layer for the first and second MOS transistors; and a variable resistance element which is formed between side wall insulating films formed at respective side walls of a first gate electrode of the first MOS transistor and a second gate electrode of the second MOS transistor and is connected to the common diffusion layer.

Abstract: Disclosed herein is a nonvolatile semiconductor memory device, including a memory transistor. The memory transistor has a channel formation region defined between two source and drain regions formed on a semiconductor substrate a bottom insulating film, a charge storage film and a top insulating film formed in order at least on the channel formation region, the charge storage film having a charge storage function, and a gate electrode formed on the top insulating film. The bottom insulating film is formed from a plurality of films containing nitrogen such that the content of nitrogen of a lowermost one of the films which contacts with the channel formation region and an uppermost one of the films which contacts with the gate electrode is higher than that of the other one or ones of the films which exist between the uppermost and lowermost films.

Abstract: Disclosed herein is a semiconductor memory including: a first MOS transistor having two diffusion layers formed in a semiconductor substrate; a second MOS transistor which is formed in the semiconductor substrate and has one of the two diffusion layers of the first MOS transistor as a common diffusion layer for the first and second MOS transistors; and a variable resistance element which is formed between side wall insulating films formed at respective side walls of a first gate electrode of the first MOS transistor and a second gate electrode of the second MOS transistor and is connected to the common diffusion layer.

Abstract: Disclosed herein is a nonvolatile semiconductor memory device, including a memory transistor. The memory transistor has: a channel formation region defined between two source and drain regions formed on a semiconductor substrate; a bottom insulating film, a charge storage film and a top insulating film formed in order at least on the channel formation region, the charge storage film having a charge storage function, and a gate electrode formed on the top insulating film. The bottom insulating film is formed from a plurality of films containing nitrogen such that the content of nitrogen of a lowermost one of the films which contacts with the channel formation region and an uppermost one of the films which contacts with the gate electrode is higher than that of the other one or ones of the films which exist between the uppermost and lowermost films.

Abstract: The memory device has a plurality of dielectric films including charge storage layers CS having a charge holding capability therein and stacked on an active region of a semiconductor SUB and electrodes G on the plurality of dielectric films. Each charge storage layer CS includes a first nitride film CS1 made of silicon nitride or silicon oxynitride and a second nitride film CS2 made of silicon nitride or silicon oxynitride and having a higher charge trap density than the first nitride film CS1. The first nitride film CS1 is formed by chemical vapor deposition using a first gas which contains a first silicon-containing gas containing chlorine with a predetermined percent composition and a nitrogen-containing gas as starting materials. The second nitride film CS2 is formed by chemical vapor deposition using a second gas which contains a second silicon-containing gas having a lower chlorine percent composition than the above predetermined percent composition and a nitrogen-containing gas as starting materials.

Abstract: The memory device has a plurality of dielectric films including charge storage layers CS having a charge holding capability therein and stacked on an active region of a semiconductor SUB and electrodes G on the plurality of dielectric films. Each charge storage layer CS includes a first nitride film CS1 made of silicon nitride or silicon oxynitride and a second nitride film CS2 made of silicon nitride or silicon oxynitride and having a higher charge trap density than the first nitride film CS1. The first nitride film CS1 is formed by chemical vapor deposition using a first gas which contains a first silicon-containing gas containing chlorine with a predetermined percent composition and a nitrogen-containing gas as starting materials. The second nitride film CS2 is formed by chemical vapor deposition using a second gas which contains a second silicon-containing gas having a lower chlorine percent composition than the above predetermined percent composition and a nitrogen-containing gas as starting materials.

Abstract: The memory device has a plurality of dielectric films including charge storage layers CS having a charge holding capability therein and stacked on an active region of a semiconductor SUB and electrodes G on the plurality of dielectric films. Each charge storage layer CS includes a first nitride film CS1 made of silicon nitride or silicon oxynitride and a second nitride film CS2 made of silicon nitride or silicon oxynitride and having a higher charge trap density than the first nitride film CS1. The first nitride film CS1 is formed by chemical vapor deposition using a first gas which contains a first silicon-containing gas containing chlorine with a predetermined percent composition and a nitrogen-containing gas as starting materials. The second nitride film CS2 is formed by chemical vapor deposition using a second gas which contains a second silicon-containing gas having a lower chlorine percent composition than the above predetermined percent composition and a nitrogen-containing gas as starting materials.

Abstract: The memory device has a plurality of dielectric films including charge storage layers CS having a charge holding capability therein and stacked on an active region of a semiconductor SUB and electrodes G on the plurality of dielectric films. Each charge storage layer CS includes a first nitride film CS1 made of silicon nitride or silicon oxynitride and a second nitride film CS2 made of silicon nitride or silicon oxynitride and having a higher charge trap density than the first nitride film CS1. The first nitride film CS1 is formed by chemical vapor deposition using a first gas which contains a first silicon-containing gas containing chlorine with a predetermined percent composition and a nitrogen-containing gas as starting materials. The second nitride film CS2 is formed by chemical vapor deposition using a second gas which contains a second silicon-containing gas having a lower chlorine percent composition than the above predetermined percent composition and a nitrogen-containing gas as starting materials.

Abstract: A non-volatile memory device in which gate electrodes are formed on an upper surface and a lower surface of the channel via insulating layers, respectively, one of them is used as a read electrode and the other is used as a write electrode, whereby, at a read operation, the reading is carried out with a reduced influence upon stored charges stored at the time of writing. Particularly, it has a structure in which a source and drain region of the non-volatile semiconductor memory device is formed in the semiconductor layer formed on the insulating layer and, at the same time, one of the read electrode and write electrode is buried in the insulating layer.

Abstract: A non-volatile memory device in which gate electrodes are formed on an upper surface and a lower surface of the channel via insulating layers, respectively, one of them is used as a read electrode and the other is used as a write electrode, whereby, at a read operation the reading is carried out without exerting an influence upon stored charges stored at the time of writing. Particularly, it has a structure in which a source and drain region of the non-volatile semiconductor memory device in formed in the semiconductor layer formed on the insulating layer and, at the same time, one of the read electrode and write electrode is buried in the insulating layer.