Patents by Inventor Hiroshi Azakami

Hiroshi Azakami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8165192
    Abstract: Tap coefficients of an FIR filter are prevented from converging to wrong values. A waveform equalizer for performing waveform equalization of an input signal and outputting a waveform equalization result as an output signal includes: an FIR filter for performing a convolution operation between the input signal and a plurality of tap coefficients; an IIR filter for performing a convolution operation between the output signal and a plurality of tap coefficients; an adding section for adding an operation result of the FIR filter and an operation result of the IIR filter and outputting an addition result as the output signal; an error detecting section for detecting an error of the output signal; and a tap coefficient updating section for updating respective tap coefficients of the FIR filter and the IIR filter based on the error.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: April 24, 2012
    Assignee: Panasonic Corporation
    Inventors: Yousuke Kimura, Haruka Takano, Hiroshi Azakami
  • Publication number: 20100013570
    Abstract: Tap coefficients of an FIR filter are prevented from converging to wrong values. A waveform equalizer for performing waveform equalization of an input signal and outputting a waveform equalization result as an output signal includes: an FIR filter for performing a convolution operation between the input signal and a plurality of tap coefficients; an IIR filter for performing a convolution operation between the output signal and a plurality of tap coefficients; an adding section for adding an operation result of the FIR filter and an operation result of the IIR filter and outputting an addition result as the output signal; an error detecting section for detecting an error of the output signal; and a tap coefficient updating section for updating respective tap coefficients of the FIR filter and the IIR filter based on the error.
    Type: Application
    Filed: October 19, 2007
    Publication date: January 21, 2010
    Inventors: Yousuke Kimura, Haruka Takano, Hiroshi Azakami
  • Patent number: 7551908
    Abstract: In a high-frequency signal level detection apparatus for detecting an inputted signal level of a high-frequency signal, an AGC circuit executes an AGC on an intermediate frequency (IF) signal obtained by converting a frequency of a received high-frequency signal, using an RFAGC value and an IFAGC value for controlling gains of the high-frequency signal and the IF signal, respectively, based on the IF signal so that an output level of the IF signal is substantially constant. A controller previously measures first and second relational data, indicating an RFAGC value and an IFAGC value relative to the inputted signal level of the received high-frequency signal, respectively, measures the RFAGC and IFAGC values when a high-frequency signal to be measured is received, and detects the inputted signal level of the received high-frequency signal using the measured first and second relational data based on the measured RFAGC and IFAGC values.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: June 23, 2009
    Assignee: Panasonic Corporation
    Inventors: Hiroshi Azakami, Misao Teshima, Shougo Sasaki, Yoshikazu Hayashi
  • Patent number: 7302021
    Abstract: In a digital broadcast receiving apparatus for amplifying a received modulated digital signal wave with automatically adjusted gain and demodulating the modulated signal wave to a digital signal, a tuner frequency-converts the modulated digital signal wave to generate a first modulated signal. A first automatic gain control amplification unit controls gain of the tuner to make a level of the first modulated signal at a first predetermined level. An A/D converter converts the first modulated signal into a second modulated signal. A demodulator demodulates the second modulated signal to generate a first demodulated digital signal. A second automatic gain control amplifier generates a second demodulated digital signal where frequency fluctuations included in the digital modulated wave are eliminated.
    Type: Grant
    Filed: June 12, 2001
    Date of Patent: November 27, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takaaki Konishi, Hiroshi Azakami, Kazuya Ueda, Naoya Tokunaga
  • Publication number: 20070041480
    Abstract: In a high-frequency signal level detection apparatus for detecting an inputted signal level of a high-frequency signal, an AGC circuit executes an AGC on an intermediate frequency (IF) signal obtained by converting a frequency of a received high-frequency signal, using an RFAGC value and an IFAGC value for controlling gains of the high-frequency signal and the IF signal, respectively, based on the IF signal so that an output level of the IF signal is substantially constant. A controller previously measures first and second relational data, indicating an RFAGC value and an IFAGC value relative to the inputted signal level of the received high-frequency signal, respectively, measures the RFAGC and IFAGC values when a high-frequency signal to be measured is received, and detects the inputted signal level of the received high-frequency signal using the measured first and second relational data based on the measured RFAGC and IFAGC values.
    Type: Application
    Filed: April 21, 2004
    Publication date: February 22, 2007
    Inventors: Hiroshi Azakami, Misao Teshima, Shougo Sasaki, Yoshikazu Hayashi
  • Patent number: 7133481
    Abstract: An input signal DT contains a segment synchronization signal compliant with the ATSC standard. A clock multiplication section 111 multiplies a clock CK. A switchable sampling section 112 selects a sample point from among a plurality of timing points that are defined by the multiplied clock, and samples the input signal DT at the selected sample point. Moreover, the switchable sampling section 112 switches sample points from one to another in a synchronization-unestablished state. Once the segment synchronization is established, a synchronization detection device may maintain a synchronization-established state until the field synchronization detection fails, or the synchronization detection device may output a synchronization detection signal after shifting it in the time direction based on a bit error rate RT of the input signal.
    Type: Grant
    Filed: April 5, 2002
    Date of Patent: November 7, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Azakami, Takaaki Konishi, Hisaya Kato, Naoya Tokunaga, Kazuaki Suzuki, Kazuya Ueda
  • Patent number: 7054395
    Abstract: A digital demodulation apparatus automatically controls gain based on a state of receiving a digital modulated signal. The digital demodulation apparatus amplifies a digital modulated signal wave received through the air with the gain automatically controlled so as to have a predetermined amplitude. In the digital demodulation apparatus, a receive level variation detector detects receive level variation, an amount of noise components of the received digital signal wave. A gain controller 15 controls the gain with a receive level variation adaptive control signal based on the detected receive level variation, the amount of noise components.
    Type: Grant
    Filed: May 14, 2001
    Date of Patent: May 30, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Azakami, Takaaki Konishi, Hisaya Kato, Naoya Tokunaga, Hiroaki Ozeki, Kazuya Ueda
  • Patent number: 6934522
    Abstract: In an automatic gain control amplifier, an RF automatic gain controller controls the gain of a radio frequency signal. A frequency converter frequency-converts the radio frequency signal into an intermediate frequency signal. An IF automatic gain controller controls the gain of the intermediate frequency. A level detector detects a signal level of the gain-controlled intermediate frequency signal, and generates a level signal. An automatic gain control signal generator separately controls, based the level signal, the RF automatic gain controller and the IF automatic gain controller.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: August 23, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takaaki Konishi, Hiroshi Azakami, Kazuya Ueda, Naoya Tokunaga, Hisaya Kato, Hiroaki Ozeki
  • Patent number: 6914945
    Abstract: In a clock recovery circuit for DTV using a VSB modulation method, if the frequency of the symbol clock is fs, since the frequency difference between the fs/2 component signal of the VSB signal and the pilot signal is constant at fs/2, it is possible accurately to detect the phase error from their differential signal. Furthermore there is no distortion of the clock signal frequency of the VSB signal, even when the symbol data is distorted by multi-pass distortion or the like, since clock signal regeneration is performed by frequency domain processing. By employing this type of principle and performing phase error detection for each symbol at a time, it is possible to ensure a high speed tracking performance for clock signal regeneration.
    Type: Grant
    Filed: June 19, 2001
    Date of Patent: July 5, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hisaya Kato, Ippei Kanno, Hiroshi Azakami
  • Patent number: 6671002
    Abstract: The loop gain of an AGC circuit 7 and the loop gain of a clock regenerating circuit 6 are increased (the gain of an amplifier is increased, or the band of a loop filter is widened) until a synchronizing signal (a segment synchronizing signal or a field synchronizing signal) is detected. The loop gain of the AGC circuit 7 and the loop gain of the clock regenerating circuit 6 are decreased (the gain of the amplifier is decreased, or the band of the loop filter is narrowed) after the synchronizing signal is detected. Consequently, it is possible to make a reduction of a time period required until convergence processing is completed in the AGC circuit and the clock regenerating circuit compatible with an improvement of a ghost disturbance removal performance and accurate clock regeneration.
    Type: Grant
    Filed: August 7, 2000
    Date of Patent: December 30, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takaaki Konishi, Kazuya Ueda, Hiroshi Azakami
  • Publication number: 20030190002
    Abstract: An input signal DT contains a segment synchronization signal compliant with the ATSC standard. A clock multiplication section 111 multiplies a clock CK. A switchable sampling section 112 selects a sample point from among a plurality of timing points that are defined by the multiplied clock, and samples the input signal DT at the selected sample point. Moreover, the switchable sampling section 112 switches sample points from one to another in a synchronization-unestablished state. Once the segment synchronization is established, a synchronization detection device may maintain a synchronization-established state until the field synchronization detection fails, or the synchronization detection device may output a synchronization detection signal after shifting it in the time direction based on a bit error rate RT of the input signal.
    Type: Application
    Filed: December 18, 2002
    Publication date: October 9, 2003
    Inventors: Hiroshi Azakami, Takaaki Konishi, Hisaya Kato, Naoya Tokunaga, Kazuaki Suzuki, Kazuya Ueda
  • Publication number: 20020021371
    Abstract: In a digital broadcast receiving apparatus for amplifying a received modulated digital signal wave RF with automatically adjusted gain and demodulating the modulated signal wave to a digital signal SDMD, a tuner 2 frequency-converts the modulated digital signal wave Srf to generate a first modulated signal SMA. A first automatic gain control amplification unit AGC1 controls gain of the tuner 2 to make a level of the first modulated signal SMA at a first predetermined level. An A/D converter 3 converts the first modulated signal SMA into a second modulated signal SMD. A demodulator 7 demodulates the second modulated signal SMD to generate a first demodulated digital signal SDD. A second automatic gain control amplifier AGC2a generates a second demodulated digital signal SMDa where frequency fluctuations included in the digital modulated wave Srf are eliminated.
    Type: Application
    Filed: June 12, 2001
    Publication date: February 21, 2002
    Inventors: Takaaki Konishi, Hiroshi Azakami, Kazuya Ueda, Naoya Tokunaga
  • Publication number: 20020003836
    Abstract: A digital demodulation apparatus is provided for automatically controlling gain based on a state of receiving a digital modulated signal.
    Type: Application
    Filed: May 14, 2001
    Publication date: January 10, 2002
    Inventors: Hiroshi Azakami, Takaaki Konishi, Hisaya Kato, Naoya Tokunaga, Hiroaki Ozeki, Kazuya Ueda
  • Publication number: 20010055349
    Abstract: In a clock recovery circuit for DTV using a VSB modulation method, if the frequency of the symbol clock is fs, since the frequency difference between the fs/2 component signal of the VSB signal and the pilot signal is constant at fs/2, it is possible accurately to detect the phase error from their differential signal. Furthermore there is no distortion of the clock signal frequency of the VSB signal, even when the symbol data is distorted by multi-pass distortion or the like, since clock signal regeneration is performed by frequency domain processing. By employing this type of principle and performing phase error detection for each symbol at a time, it is possible to ensure a high speed tracking performance for clock signal regeneration.
    Type: Application
    Filed: June 19, 2001
    Publication date: December 27, 2001
    Inventors: Hisaya Kato, Ippei Kanno, Hiroshi Azakami
  • Publication number: 20010055956
    Abstract: In an automatic gain control amplifier AGCa, an RF automatic gain controller 2 controls the gain of a radio frequency signal Srf. A frequency converter 3, 4 frequency-converts the radio frequency signal Srfa into an intermediate frequency signal Sifa. An IF automatic gain controller 5 controls the gain of the intermediate frequency Sifa. A level detector LDa detects a signal level of the gain-controlled intermediate frequency signal Sifa, and generates a level signal SLa. An automatic gain control signal generator SGa, SGb separately controls, based the level signal SLa, SLb, the RF automatic gain controller 2 and the IF automatic gain controller 5.
    Type: Application
    Filed: June 22, 2001
    Publication date: December 27, 2001
    Inventors: Takaaki Konishi, Hiroshi Azakami, Kazuya Ueda, Naoya Tokunaga, Hisaya Kato, Hiroaki Ozeki
  • Patent number: 6075829
    Abstract: A digital broadcast receiver for receiving a digital modulation signal of the present invention includes channel selection means inputting a digital modulation signal of a radio frequency band and frequency converting a desired digital modulation signal into a designated intermediate frequency signal; oscillation means for generating a local oscillation signal used for frequency conversion at the channel selection means; oscillation frequency control means for controlling a frequency of the local oscillation signal at the oscillation means; phase noise characteristic control means for improving a phase noise characteristic of the local oscillation signal generated at the oscillation means; filter means for extracting the intermediate frequency signal selected at channel selection means; orthogonal detection means for orthogonally detecting the intermediate frequency signal extracted at the filter means; A/D converter means for converting the analog output of the orthogonal detection means into a digital signa
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: June 13, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshikazu Hayashi, Noriaki Omoto, Takaaki Konishi, Hiroshi Azakami, Takashi Hasegawa
  • Patent number: 6072999
    Abstract: A receiving apparatus is presented, in which a channel frequency can be selected over a wide band with an increased attenuation at an image frequency and/or at a local oscillation frequency by including a tunable filter having a following construction. Microstrip lines are connected between either one of the input or the output terminal or both of the input and output terminals of the tunable filter; a plurality of resonant circuits are formed by each of a plurality of coils and a plurality of variable capacitance diodes; and the coils are electromagnetically coupled and where a voltage applied to each cathode of each of a plurality of variable capacitance diodes through each of a plurality of resistors is controlled to tune a frequency to be received.
    Type: Grant
    Filed: April 1, 1997
    Date of Patent: June 6, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takaaki Konishi, Noriaki Omoto, Yoshikazu Hayashi, Hiroshi Azakami