Abstract: Disclosed is a dicing system including a protection layer forming apparatus, a patterning apparatus, a plasma treatment apparatus, a measuring apparatus that obtains at least of first processing data relating to a protection layer, second processing data relating to a mask, and third processing data relating to element chips, and a control unit that operates at least one of the protection layer forming apparatus, the patterning apparatus, and the plasma treatment apparatus on a recipe that is defined for each of the apparatuses. The control unit determines, based on at least one of the first processing data, whether or not to modify the recipe, the second processing data, and the third processing data, modifies the at least one of the recipes if the recipe needs to be modified, and operates at least one of the protection layer forming apparatus, the patterning apparatus, and the plasma treatment apparatus based on the modified recipe.

Abstract: The chip manufacturing method includes: a preparing step of preparing a substrate 1 having a plurality of elements 2; a defining step of defining, based on information regarding a satisfactory element 2a and/or a defective element 2b, an arrangement of chips 10 each composed of two or more adjacent ones of the elements 2 such that the number of the chips 10 that include only the satisfactory elements 2a is larger than in the case of dividing the substrate 1 into a plurality of the chips 10 along virtual dicing lines formed assuming that the defective element 2b does not exist; a mask forming step of forming, based on the defined arrangement of the chips 10, a mask 20 that has openings 20a and that covers the chips 10; and a dividing step of dividing the substrate 1 into a plurality of the chips 10 by plasma etching.

Abstract: It is an object of the invention to effectively absorb a power noise and to implement the stable operation of a circuit. The invention provides a semiconductor device comprising a bypass capacitor including an MOS structure having a gate electrode formed to be extended from a power wiring region to a portion provided under an empty region which is adjacent to the power wiring region and has no other functional layer, and formed through a capacitive insulating film on a diffusion region having one conductivity type, and a substrate contact formed under a ground wiring region and fixing a substrate potential, wherein the bypass capacitor has a contact to come in contact with the power wiring which is formed on a surface of the gate electrode and has the diffusion region having the one conductivity type and a diffusion region of the substrate contact connected to each other.

Abstract: To provide a data transmitting apparatus and the like capable of enhancing error detection accuracy without increasing a bandwidth unnecessarily used for the error detection performed on encrypted data and minimizing deterioration in sound quality of the data by effectively reducing noises in the transmission of the data through networks for cars and the like even though the data transmitting apparatus has been simply structured. The present invention makes it possible to perform error detection on audio data according to the sizes of encrypted blocks or packets using simple error check codes embedded in the audio data, or to perform error detection using a variation sequence of attribute information to be transmitted together with the audio data. In this case, output of the sound resulting from the audio data having an error is stopped.

Abstract: It is an object of the invention to effectively absorb a power noise and to implement the stable operation of a circuit. The invention provides a semiconductor device comprising a bypass capacitor including an MOS structure having a gate electrode formed to be extended from a power wiring region to a portion provided under an empty region which is adjacent to the power wiring region and has no other functional layer, and formed through a capacitive insulating film on a diffusion region having one conductivity type, and a substrate contact formed under a ground wiring region and fixing a substrate potential, wherein the bypass capacitor has a contact to come in contact with the power wiring which is formed on a surface of the gate electrode and has the diffusion region having the one conductivity type and a diffusion region of the substrate contact connected to each other.

Abstract: It is an object of the invention to effectively absorb a power noise and to implement the stable operation of a circuit. The invention provides a semiconductor device comprising a bypass capacitor including an MOS structure having a gate electrode formed to be extended from a power wiring region to a portion provided under an empty region which is adjacent to the power wiring region and has no other functional layer, and formed through a capacitive insulating film on a diffusion region having one conductivity type, and a substrate contact formed under a ground wiring region and fixing a substrate potential, wherein the bypass capacitor has a contact to come in contact with the power wiring which is formed on a surface of the gate electrode and has the diffusion region having the one conductivity type and a diffusion region of the substrate contact connected to each other.

Abstract: A method of evaluating noise immunity of a semiconductor device is provided. An actual circuit including the semiconductor device is represented by an equivalent circuit which has a target equivalent circuit, a noise source equivalent circuit, and an external equivalent circuit connected in parallel. The target equivalent circuit represents the semiconductor device. The noise source equivalent circuit represents a noise source outside the semiconductor device, and supplies noise to the target equivalent circuit. The external equivalent circuit represents a circuit outside the semiconductor device. The noise immunity is evaluated based on a voltage or current which arises in the target equivalent circuit by the noise. In this way, the immunity of the semiconductor device against extraneous noise can be evaluated in consideration of the effects of the circuitry outside the semiconductor device.

Abstract: A backup memory, a DMA (direct memory access) controller, and a WDT (watch dog timer) are provided in addition to a CPU (central processing unit), a RAM (random access memory), and a peripheral circuit. The DMA controller exercises control so that respective data of the CPU, RAM and peripheral circuit is saved in the backup memory each time the CPU, being under normal operation, supplies a counter reset signal to the WDT, and so that the data that has been saved in the backup memory is restored to the CPU, the RAM and the peripheral circuit, respectively, if the WDT has detected a program runaway and outputted a time-over signal. Therefore, even in a case where a program runaway has occurred in the CPU, normal operation is permitted to be resumed from midway in the program.

Abstract: It is an object of the invention to effectively absorb a power noise and to implement the stable operation of a circuit. The invention provides a semiconductor device comprising a bypass capacitor including an MOS structure having a gate electrode formed to be extended from a power wiring region to a portion provided under an empty region which is adjacent to the power wiring region and has no other functional layer, and formed through a capacitive insulating film on a diffusion region having one conductivity type, and a substrate contact formed under a ground wiring region and fixing a substrate potential, wherein the bypass capacitor has a contact to come in contact with the power wiring which is formed on a surface of the gate electrode and has the diffusion region having the one conductivity type and a diffusion region of the substrate contact connected to each other.

Abstract: A backup memory, a DMA (direct memory access) controller, and a WDT (watch dog timer) are provided in addition to a CPU (central processing unit), a RAM (random access memory), and a peripheral circuit. The DMA controller exercises control so that respective data of the CPU, RAM and peripheral circuit is saved in the backup memory each time the CPU, being under normal operation, supplies a counter reset signal to the WDT, and so that the data that has been saved in the backup memory is restored to the CPU, the RAM and the peripheral circuit, respectively, if the WDT has detected a program runaway and outputted a time-over signal. Therefore, even in a case where a program runaway has occurred in the CPU, normal operation is permitted to be resumed from midway in the program.

Abstract: To provide a device and method for preventing a computer from malfunctioning due to external noise, while maintaining continuity of computer processing. A clock generation circuit detects a presence or absence of external noise which enters into the computer. The clock generation circuit generates an operation clock signal whose pulse width is (a) a first width when the external noise is not detected and (b) a second width greater than the first width when the external noise is detected. The clock generation circuit supplies the generated operation clock signal to the computer.

Abstract: A method of evaluating noise immunity of a semiconductor device is provided. An actual circuit including the semiconductor device is represented by an equivalent circuit which has a target equivalent circuit, a noise source equivalent circuit, and an external equivalent circuit connected in parallel. The target equivalent circuit represents the semiconductor device. The noise source equivalent circuit represents a noise source outside the semiconductor device, and supplies noise to the target equivalent circuit. The external equivalent circuit represents a circuit outside the semiconductor device. The noise immunity is evaluated based on a voltage or current which arises in the target equivalent circuit by the noise. In this way, the immunity of the semiconductor device against extraneous noise can be evaluated in consideration of the effects of the circuitry outside the semiconductor device.

Abstract: A printing material comprises a shaped structure made of a combustible material and an oxidizing agent, or a self-combustible material having an oxidizing agent contained therein, or a mixture of a self-combustible material and a combustible material. The printing material is formed with pits by application of a laser beam with small output power. The printing material may further comprise a light absorber in order to promote absorption of the laser beam in the printing material.

Abstract: A coordinate position digitizing system incorporates apparatus for detecting the X and Y positions of a voltage detecting device relative to a position determining plate employing apparatus for generating data corresponding to the X and Y positions of said voltage detecting device on said plate at successive sampling times, means for calculating the difference corresponding to the difference in the indicated position at two successive sampling periods, and rejecting signals indicating positions which differ from previous positions by distances which are greater than a predetermined amount, corresponding to the maximum distance that the voltage detecting device can be moved between successive sampling periods. In this way, position-indicating signals which are corrupted by noise pulses or the like are rejected.