Abstract: A computing system capable of obtaining a calculation speed exceeding that of 16-bit floating point processing while maintaining accuracy of calculation results. A computing system includes a parameter server, a communication path and a worker. The parameter server has a storage unit that stores a parameter value of a training target model, and a first conversion unit that converts the parameter value into data represented by a floating point number with 10 bits or less. The communication path transmits the data transmitted and received between the parameter server and the worker. The worker has a processing unit that computes a product and a sum of the data. The parameter server further has a second conversion unit that converts the data with 10 bits or less received from the worker into an updating difference, and an updating unit that updates the parameter value on the basis of the updating difference.

Abstract: Provided is a computing system capable of obtaining a calculation speed exceeding that of 16-bit floating point processing while maintaining accuracy of calculation results. A computing system 1 includes a parameter server 10, a communication path 20 and a worker 30. The parameter server has a storage unit 11 that stores a parameter value of a training target model represented by a 32-bit floating point number, and a first conversion unit 12 that converts the parameter value into data represented by a floating point number with 10 bits or less, in which a mantissa is 3 bits or less and an exponent is 6 bits or less. The communication path transmits the data transmitted and received between the parameter server and the worker. The worker has a processing unit 31 that computes a product and a sum of the data.

Abstract: A signal detection device includes: multiple electrodes that are arranged to come into contact with a subject that generates a signal; an electrode signal selection unit that alternatively selects one signal from signals on the multiple electrodes based on a selection signal; an amplification unit that amplifies the signal that is selected by the electrode signal selection unit; and a flexible substrate on which the multiple electrodes, the selection unit, and the amplification unit are formed, in which the amplification unit is formed on the substrate to form a laminated structure together with the multiple electrodes and the selection unit.

Abstract: An applicator includes: a liquid medicine container having an opening, and a brush member arranged adjacently to the liquid medicine container to cover the opening. The brush member is made up of a plurality of fibers that are bundled together. The brush member has a tubular shape in a root portion located adjacently to the liquid medicine container, tapers from the root portion toward a top end portion located opposite to the liquid medicine container, and has a wedge shape in the top end portion.

Abstract: A clock generation circuit 10 includes a resonant reactor connected with a half voltage supply point TV1, a resonant capacitor CL connected between a ground voltage supply point TVss and an output terminal TVout, a transistor MPconnected between the resonant reactor Lr and the resonant capacitor CL, and a transistor MN1 connected with the output terminal TVout. In this configuration, signals in a wide range of frequencies can be output with low power consumption by adjusting the time when a clock signal ?1 applied to the gates of the transistors MP1 and MN1 is high.

Abstract: A signal detection device includes: multiple electrodes that are arranged to come into contact with a subject that generates a signal; an electrode signal selection unit that alternatively selects one signal from signals on the multiple electrodes based on a selection signal; an amplification unit that amplifies the signal that is selected by the electrode signal selection unit; and a flexible substrate on which the multiple electrodes, the selection unit, and the amplification unit are formed, in which the amplification unit is formed on the substrate to form a laminated structure together with the multiple electrodes and the selection unit.

Abstract: A clock generation circuit 10 includes a resonant reactor connected with a half voltage supply point TV1, a resonant capacitor CL connected between a ground voltage supply point TVss and an output terminal TVout, a transistor MP1 connected between the resonant reactor Lr and the resonant capacitor CL, and a transistor MN1 connected with the output terminal TVout. In this configuration, signals in a wide range of frequencies can be output with low power consumption by adjusting the time when a clock signal ?1 applied to the gates of the transistors MP1 and MN1 is high.