Patents by Inventor Hiroshi Fukuda

Hiroshi Fukuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10558048
    Abstract: A game system 100 to which an image display system is applied contains a head-mounted display 300 having a camera for capturing a real world and a display for displaying video information obtained by integrating real-world video information captured by the capturing part with virtual-world video information, a motion sensor 400 for detecting movement of a body of a wearer wearing the head-mounted display 300 as movement information and a marker 200 used for detecting position information of the wearer. The game system 100 controls the virtual-world video information based on the movement information and the position information. According to this configuration, it is possible to control the video information displayed on the head-mounted display according to the position and the movement of the wearer. Further, the present invention provides a method for controlling the image display system, an image distribution system and a head-mounted display.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: February 11, 2020
    Assignee: MELEAP INC.
    Inventors: Hiroshi Fukuda, Hitoshi Araki, Takuma Motoki, Naoki Ota, Tsuyoshi Takeuchi
  • Patent number: 10528715
    Abstract: An authentication device includes: a wearing position determination unit that determines a wearing position, the wearing position being a position at which a wearable article comprising a sensor is being worn on a body; and an authentication unit that performs authentication by using biometric information of the body, the biometric information being detected by the sensor at the wearing position.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: January 7, 2020
    Assignee: NEC CORPORATION
    Inventor: Hiroshi Fukuda
  • Publication number: 20190371568
    Abstract: A purpose of the present invention is to provide a pattern measurement device that allows the selection of device conditions for calculating proper variability and allows the estimation of proper variability. The present invention provides a pattern measurement device comprising a computation processing device that, on the basis of a plurality of measured values acquired by a charged particle radiation device, calculates the variability of the measured values of a pattern that is the object of measurement, said pattern measurement device characterized in that a variability ?measured of the plurality of measured values formed at different positions and ?2observed=?2pattern/Np+?2sem0/(Np·Nframe) are used to calculate ?SEM0, which indicates measurement reproducibility error. ?pattern0 is the variability due to pattern shape error, Np is the number of measurement points, and Nframe is a value that changes according to device conditions.
    Type: Application
    Filed: September 29, 2016
    Publication date: December 5, 2019
    Inventor: Hiroshi FUKUDA
  • Patent number: 10496807
    Abstract: An authentication device includes: a wearing position determination unit that determines a wearing position, the wearing position being a position at which a wearable article comprising a sensor is being worn on a body; and an authentication unit that performs authentication by using biometric information of the body, the biometric information being detected by the sensor at the wearing position.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: December 3, 2019
    Assignee: NEC CORPORATION
    Inventor: Hiroshi Fukuda
  • Patent number: 10488347
    Abstract: A defect classification method in accordance with the present invention uses two types of images output from the defect inspection device 150 (i.e., the first inspection image generated from a luminance signal sequentially output from a detector SE and the second inspection image generated from a difference of the signals from an adjacent portion in a region where the defect exists). The first inspection image includes information for discriminating unevenness of the defective shape. Also, while it is difficult to discriminate unevenness of the defective shape by the second inspection image, the second inspection image includes information on a luminance distribution emphasizing a defective section. The region of the defective section is extracted from the second inspection image to be applied to the first inspection image and thereby define an arithmetic processing area, and the image processing is performed within the arithmetic processing area to compute a feature amount.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: November 26, 2019
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Tsuneo Terasawa, Hiroshi Fukuda, Daisuke Iwai
  • Publication number: 20190353844
    Abstract: An optical module which is connectable to an optical fiber array and which can be packaged in a high density. Two 30 mm square package modules are mounted on a board, and optical waveguides in a 20 mm square Si photonic lightwave circuit mounted on the package module are connected to an optical fiber array fixed to an optical fiber block (15×10 mm). Moreover, output end surfaces of the optical waveguides in the Si photonic lightwave circuit are perpendicular to a mount surface of the package module. In the embodiment, the optical waveguides in the Si photonic lightwave circuit are tilted at an appropriate angle, for example, 20 degrees with respect to a direction perpendicular to a right end surface. Moreover, the optical fiber block fixes optical fibers with the optical fibers tilted at 20 degrees with respect to a direction perpendicular to an end surface connected to the Si photonic lightwave circuit.
    Type: Application
    Filed: May 12, 2017
    Publication date: November 21, 2019
    Inventors: Tomohiro Nakanishi, Teruaki Sato, Motohaya Ishii, Satoru Konno, Yuichi Suzuki, Shigeo Nagashima, Shinji Mino, Shuichiro Asakawa, Hiroshi Fukuda, Shin Kamei, Shunichi Soma, Ken Tsuzuki, Mitsuo Usui, Takashi Saida
  • Publication number: 20190331608
    Abstract: A defect classification method in accordance with the present invention uses two types of images output from the defect inspection device 150 (i.e., the first inspection image generated from a luminance signal sequentially output from a detector SE and the second inspection image generated from a difference of the signals from an adjacent portion in a region where the defect exists). The first inspection image includes information for discriminating unevenness of the defective shape. Also, while it is difficult to discriminate unevenness of the defective shape by the second inspection image, the second inspection image includes information on a luminance distribution emphasizing a defective section. The region of the defective section is extracted from the second inspection image to be applied to the first inspection image and thereby define an arithmetic processing area, and the image processing is performed within the arithmetic processing area to compute a feature amount.
    Type: Application
    Filed: April 23, 2019
    Publication date: October 31, 2019
    Applicant: Shin-Etsu Chemical Co., Ltd.
    Inventors: Tsuneo Terasawa, Hiroshi Fukuda, Daisuke Iwai
  • Publication number: 20190188367
    Abstract: An authentication device includes: a wearing position determination unit that determines a wearing position, the wearing position being a position at which a wearable article comprising a sensor is being worn on a body; and an authentication unit that performs authentication by using biometric information of the body, the biometric information being detected by the sensor at the wearing position.
    Type: Application
    Filed: February 26, 2019
    Publication date: June 20, 2019
    Applicant: NEC Corporation
    Inventor: Hiroshi Fukuda
  • Publication number: 20190186910
    Abstract: The purpose of the present invention is to provide a pattern measurement device that achieves both high-throughput measurement using a small number of measurements and high-accuracy measurement that uses statistical processing. To accomplish this purpose, the present invention proposes a pattern measurement device provided with a calculation processing device that acquires the signal intensity distribution for a plurality of positions included in a scanning region from a signal obtained through beam scanning; substitutes, into a probability density function having the signal intensity distribution as a random variable and the coordinates within the scanning region as a variable, a signal intensity distribution based on the signal obtained from the beam scanning; and for the plurality of positions within the scanning region, sets the coordinates within the scanning region at which the probability density function is at the maximum or at which prescribed conditions are met as the edge position.
    Type: Application
    Filed: September 1, 2016
    Publication date: June 20, 2019
    Inventor: Hiroshi FUKUDA
  • Publication number: 20190181961
    Abstract: An optical receiver is configured so as to be as less susceptible to noise as possible even in the case where high noise occurs inside an optical transceiver. The optical receiver includes a connection part that connects two photodiodes (PDs) constituting a dual photodiode and a transimpedance amplifier (TIA), wherein signal lines from the dual photodiode are surrounded by a conductor pattern that is not connected to each of the signal lines for each channel, and the conductor pattern is connected to a ground pattern on the transimpedance amplifier or a power source pattern for the PDs.
    Type: Application
    Filed: June 19, 2017
    Publication date: June 13, 2019
    Inventors: Toshihiro Itoh, Yuriko Kawamura, Kiyofumi Kikuchi, Ken Tsuzuki, Hiroshi Fukuda, Shin Kamei
  • Patent number: 10295744
    Abstract: A coherent optical mixer circuit is provided that can measure a phase error without requiring a step of cutting away a delay circuit. Odd-numbered or even-numbered two of four inputs of an 4-input-and-4-output multimode interference circuit are connected to an input mechanism. The four outputs of the multimode interference circuit are all connected to an output mechanism to the exterior. Other two inputs of the multimode interference circuit are connected to two monitor waveguides. One of the monitor waveguide is longer than the other to configure a light delay circuit. The monitor waveguides constituting the light delay circuit are connected to the respective outputs of a 2-branched light splitter. The 2-branched light splitter has an input connected to a monitor light input mechanism from the exterior via a monitor input waveguide.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: May 21, 2019
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Shin Kamei, Makoto Jizodo, Hiroshi Fukuda, Kiyofumi Kikuchi, Ken Tsuzuki
  • Patent number: 10295477
    Abstract: A photomask blank having a thin film on a transparent substrate is inspected for defects by irradiating inspection light to a surface region of the blank, collecting the reflected light from the irradiated region via an inspection optical system to form a magnified image of the region, extracting a feature parameter of light intensity distribution from the magnified image, and identifying the bump/pit shape of the defect based on the feature parameter combined with the structure of the thin film. The defect inspection method is effective for discriminating defects of bump or pit shape in a highly reliable manner. On application of the defect inspection method, photomask blanks having no pinhole defects are available at lower costs and higher yields.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: May 21, 2019
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Tsuneo Terasawa, Hiroshi Fukuda, Atsushi Yokohata, Takahiro Kishita, Daisuke Iwai
  • Patent number: 10277271
    Abstract: An optical module that suppresses crosstalk between high-frequency transmission lines includes at least one set of: an optical port; an optical processing circuit optically connected to the optical port; an electro-optical transducer optically connected to the optical processing circuit; two or more high-frequency transmission lines connected to the electro-optical transducer; and electrical ports connected to the high-frequency transmission lines, and includes a conductive cover block which is provided above the high-frequency transmission lines so as to at least partly cover the high-frequency transmission lines and which is grounded.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: April 30, 2019
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Kiyofumi Kikuchi, Hiroshi Fukuda, Takashi Saida, Shin Kamei, Ken Tsuzuki
  • Publication number: 20190120777
    Abstract: The present invention is directed to a pattern measuring method and the like for deriving a roughness evaluation value from which measurement noise having a frequency component is removed.
    Type: Application
    Filed: October 15, 2018
    Publication date: April 25, 2019
    Inventor: Hiroshi FUKUDA
  • Patent number: 10193653
    Abstract: A one chip-integrated digital coherent polarization multiplexing optical transmission and reception circuit with optimal optical power distribution between sending and receiving is provided by using an optical power splitter having a branching ratio of a lower asymmetry property so that the unbalanced loss depending on the polarization path can be compensated. A polarization multiplexing optical transmission and reception circuit includes a polarization multiplexing optical transmission circuit, including: the first optical power splitter for branching the optical power of continuous light outputted from a light source; one polarization optical modulation circuit at the side of a path having a higher loss connected to one output of the first optical power splitter; the second optical power splitter connected to the other output of the first optical power splitter; and the other polarization optical modulation circuit connected to one output of the second optical power splitter.
    Type: Grant
    Filed: April 12, 2016
    Date of Patent: January 29, 2019
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Shin Kamei, Makoto Jizodo, Hiroshi Fukuda, Kiyofumi Kikuchi, Ken Tsuzuki
  • Patent number: 10192083
    Abstract: It is impossible to individually identify management target articles in a conventional article management system. An article management system according to the present invention includes a reader antenna that transmits and receives a radio signal; a plurality of tag sheets each including an RF tag and placed on the reader antenna; an RFID reader that reads tag information unique to the RF tag via the reader antenna; and an identification mark attached to each of management target articles and arranged between the management target articles and each tag sheet. On a surface of the identification mark that faces the tag sheets, an identification pattern for identifying the identification mark is formed of a first pattern and a second pattern having a dielectric constant or conductivity lower than that of the first pattern.
    Type: Grant
    Filed: June 2, 2014
    Date of Patent: January 29, 2019
    Assignee: NEC Corporation
    Inventors: Wataru Hattori, Naoki Kobayashi, Hiroshi Fukuda, Yusuke Takahashi, Ryo Kawai
  • Patent number: 10190941
    Abstract: The visual detection of a silicon optical circuit in a conventional technique depends on sensory decision by a human who visually conducts checking, and there has been limitation in completely detecting small flaws. The optical circuit of the present invention includes, in addition to an optical circuit that implements desired functions, an optical waveguide for flaw detection which surrounds the entire optical circuit and which is sufficiently proximate to the optical waveguide of the optical circuit and grating couplers connected to the optical waveguide for detection. Based on the transmission characteristic measurement of the optical waveguide for detection using the grating couplers, a flaw within each chip can be efficiently discovered in the state of a wafer before being cut into chips. A flaw can also be discovered hierarchically by providing individual optical waveguides for detection for respective chips and by further forming one common optical waveguide for detection over the plurality of chips.
    Type: Grant
    Filed: November 17, 2016
    Date of Patent: January 29, 2019
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Shin Kamei, Makoto Jizodo, Kotaro Takeda, Hiroshi Fukuda
  • Publication number: 20190025595
    Abstract: A game system 100 to which an image display system is applied contains a head-mounted display 300 having a camera for capturing a real world and a display for displaying video information obtained by integrating real-world video information captured by the capturing part with virtual-world video information, a motion sensor 400 for detecting movement of a body of a wearer wearing the head-mounted display 300 as movement information and a marker 200 used for detecting position information of the wearer. The game system 100 controls the virtual-world video information based on the movement information and the position information. According to this configuration, it is possible to control the video information displayed on the head-mounted display according to the position and the movement of the wearer. Further, the present invention provides a method for controlling the image display system, an image distribution system and a head-mounted display.
    Type: Application
    Filed: February 16, 2016
    Publication date: January 24, 2019
    Inventors: Hiroshi FUKUDA, Hitoshi ARAKI, Takuma MOTOKI, Naoki OTA, Tsuyoshi TAKEUCHI
  • Patent number: 10165690
    Abstract: In a conventional soldering method, an FPC-side electrode pad and a package-side electrode pad are closely joined together with a solder layer, and the soldered state after a joining process has not been easily confirmed visually. The present invention provides a solder joint structure including a side face electrode which is formed on each of the side faces of the end parts of an FPC board and a package or PCB board that are to be soldered, extending vertically relative to the faces constituting each of electrode pads on the boards, and which introduces solder. On the side face electrodes of the board end parts, a part of solder that is formed continuously from the solder joint portion is visible and the state of the solder joint between the electrode pads on the two boards can be confirmed. The efficiency of solder joint tests can be improved.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: December 25, 2018
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Mitsuo Usui, Kiyofumi Kikuchi, Ken Tsuzuki, Hiroshi Fukuda, Shuichiro Asakawa, Shin Kamei, Shunichi Soma, Takashi Saida
  • Publication number: 20180335365
    Abstract: The visual detection of a silicon optical circuit in a conventional technique depends on sensory decision by a human who visually conducts checking, and there has been limitation in completely detecting small flaws. The optical circuit of the present invention includes, in addition to an optical circuit that implements desired functions, an optical waveguide for flaw detection which surrounds the entire optical circuit and which is sufficiently proximate to the optical waveguide of the optical circuit and grating couplers connected to the optical waveguide for detection. Based on the transmission characteristic measurement of the optical waveguide for detection using the grating couplers, a flaw within each chip can be efficiently discovered in the state of a wafer before being cut into chips. A flaw can also be discovered hierarchically by providing individual optical waveguides for detection for respective chips and by further forming one common optical waveguide for detection over the plurality of chips.
    Type: Application
    Filed: November 17, 2016
    Publication date: November 22, 2018
    Inventors: Shin Kamei, Makoto Jizodo, Kotaro Takeda, Hiroshi Fukuda