Patents by Inventor Hiroshi Hamano

Hiroshi Hamano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6965323
    Abstract: In a motor vehicle sharing system for managing motor vehicles parked in a parking area and renting the motor vehicles to users, the motor vehicle is provided with a detector for detecting the start and end of motor vehicle rental, and a usage data measuring section for starting and completing measurements for motor vehicle usage data. The detector contains a position detector for detecting the parking area. The motor vehicle is further provided with a membership list in which user information is recorded, a charge list, a rentability judging section for judging whether the motor vehicle is rentable, and a charging data generating section for making charging data by referring to the motor vehicle usage data measured by the usage data measuring section and the charge list Thus, it is possible to perform the rental and return operation without relying on a control center.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: November 15, 2005
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Takashi Uehara, Tomohide Shimizu, Hiroshi Hamano, Mamoru Kokubu, Yuji Uehara, Shunsuke Hayase, Michio Fujinuma
  • Publication number: 20050080752
    Abstract: In a motor vehicle sharing system for managing motor vehicles are parked in a parking area and renting the motor vehicles to users, the motor vehicle is provided with a detector for detecting a start of motor vehicle rental and end of the motor vehicle rental, and an usage data measuring section for starting a measurement for a motor vehicle usage data when the detector detects a start of the motor vehicle rental and completing the measurement for the motor vehicle usage data when the detector detects an end of the motor vehicle rental. The detector contains a position detector for detecting the parking area.
    Type: Application
    Filed: March 20, 2002
    Publication date: April 14, 2005
    Inventors: Takashi Uehara, Tomohide Shimizu, Hiroshi Hamano, Mamoru Kokubu, Yuji Uehara, Shunsuke Hayase, Michio Fujinuma
  • Patent number: 6858875
    Abstract: A light-emitting-element array has a semiconductor layer formed on a current-blocking layer. Light-emitting elements are formed in the semiconductor layer by diffusion of an impurity of a different conductive type. An isolation trench divides the semiconductor layer into a first region and a remaining region, and divides the array of light-emitting elements into segments disposed alternately in these two regions, each segment preferably including one or two light-emitting elements. A first shared interconnecting pad is electrically coupled to the light-emitting elements in the first region by electrical paths not crossing the isolation trench. A second shared interconnecting pad is electrically coupled to light-emitting elements in the remaining semiconductor region by electrical paths crossing the isolation trench. The array can then be driven by a number of separate interconnecting pads equal to half the number of the light-emitting elements.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: February 22, 2005
    Assignee: Oki Data Corporation
    Inventors: Hiroshi Hamano, Masumi Taninaka, Masaharu Nobori, Masumi Koizumi
  • Patent number: 6850581
    Abstract: Disclosed is a timing circuit for generating a clock signal which indicates a timing for discriminating a data signal. The timing circuit includes a branching circuit for branching a data signal in two directions, a duty monitoring circuit for monitoring the duty of a first data signal output from the branching circuit, a duty varying circuit for varying the duty of a second data signal output from the branching circuit, a control circuit for controlling the duty varying circuit on the basis of the duty information output from the duty monitoring circuit so that the duty of the data signal to be output has a predetermined value and a clock signal generator for generating the clock signal for discriminating a data signal which is synchronous with the data signal output from the duty varying circuit.
    Type: Grant
    Filed: October 10, 2002
    Date of Patent: February 1, 2005
    Assignee: Fujitsu Limited
    Inventors: Hiroaki Tomofuji, Hiroshi Hamano
  • Publication number: 20040217946
    Abstract: This invention provides a data processing apparatus and a data processing method for reducing the amount of image data denoting a pattern drawn on a whiteboard by a pen or the like being moved so as to designate locations in a designated sequence. Specifically, a coordinate transformation circuit transforms first-precision coordinate data within first image data into coordinate data of a second precision lower than the first precision, thereby generating second image data. Given the coordinate data in the second image data, a changing point detection circuit detects the coordinate data that are changed in keeping with the locations being designated movably by the pen on the whiteboard, thereby generating third image data including the detected coordinate data in the designated sequence.
    Type: Application
    Filed: April 29, 2004
    Publication date: November 4, 2004
    Inventor: Hiroshi Hamano
  • Patent number: 6765235
    Abstract: A semiconductor device has a substantially linear array of semiconductor blocks of one conductive type, each includes a diffusion region of the opposite conductive type and a electrode. The array is paralleled by an array of electrode pads, each connected to two semiconductor blocks, being connected to the diffusion region in one of the two semiconductor blocks and to the electrode in the other one of the two semiconductor blocks. The electrode pad can thus activate both semiconductor blocks, activating one semiconductor block when placed at one potential, and activating the other semiconductor block when placed at another potential. Efficient driving with a comparatively small number of electrode pads thus becomes possible.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: July 20, 2004
    Assignee: Oki Data Corporation
    Inventors: Masumi Taninaka, Hiroyuki Fujiwara, Hiroshi Hamano, Masaharu Nobori
  • Patent number: 6762437
    Abstract: A light emitting semiconductor device comprises an upper cladding layer (106) consisting of a first upper cladding layer (106a) provided on an active layer (105) and a second upper cladding layer (106b) provided on the first upper cladding layer (106a) to increase the light emitting efficiency and reduce the defective ratio in formation of a patterned layer. The energy band gap (Eg(106a)) of the first upper cladding layer (106a) is larger than the energy band gap (Eg(106b)) of the second upper cladding layer (106b), which is larger than the energy band gap (Eg(105)) of the active layer (105). One of a patterned layer, an dielectric interlayer (109) has an etched region at a predetermined area thereof so that at least a part of the upper cladding layer (106) or a second conductive type semiconductor region (108) is exposed.
    Type: Grant
    Filed: December 19, 2002
    Date of Patent: July 13, 2004
    Assignee: Oki Data Corporation
    Inventors: Mitsuhiko Ogihara, Hiroshi Hamano, Masumi Taninaka
  • Publication number: 20040021145
    Abstract: A light-emitting-element array has a semiconductor layer formed on a current-blocking layer. Light-emitting elements are formed in the semiconductor layer by diffusion of an impurity of a different conductive type. An isolation trench divides the semiconductor layer into a first region and a remaining region, and divides the array of light-emitting elements into segments disposed alternately in these two regions, each segment preferably including one or two light-emitting elements. A first shared interconnecting pad is electrically coupled to the light-emitting elements in the first region by electrical paths not crossing the isolation trench. A second shared interconnecting pad is electrically coupled to light-emitting elements in the remaining semiconductor region by electrical paths crossing the isolation trench. The array can then be driven by a number of separate interconnecting pads equal to half the number of the light-emitting elements.
    Type: Application
    Filed: July 31, 2003
    Publication date: February 5, 2004
    Inventors: Hiroshi Hamano, Masumi Taninaka, Masaharu Nobori, Masumi Koizumi
  • Publication number: 20030160255
    Abstract: A semiconductor device has a substantially linear array of semiconductor blocks of one conductive type, each includes a diffusion region of the opposite conductive type and a electrode. The array is paralleled by an array of electrode pads, each connected to two semiconductor blocks, being connected to the diffusion region in one of the two semiconductor blocks and to the electrode in the other one of the two semiconductor blocks. The electrode pad can thus activate both semiconductor blocks, activating one semiconductor block when placed at one potential, and activating the other semiconductor block when placed at another potential. Efficient driving with a comparatively small number of electrode pads thus becomes possible.
    Type: Application
    Filed: February 25, 2003
    Publication date: August 28, 2003
    Applicant: Oki Data Corporation
    Inventors: Masumi Taninaka, Hiroyuki Fujiwara, Hiroshi Hamano, Masaharu Nobori
  • Publication number: 20030122135
    Abstract: A light emitting semiconductor device comprises an upper cladding layer (106) consisting of a first upper cladding layer (106a) provided on an active layer (105) and a second upper cladding layer (106b) provided on the first upper cladding layer (106a) to increase the light emitting efficiency and reduce the defective ratio in formation of a patterned layer. The energy band gap (Eg(106a)) of the first upper cladding layer (106a) is larger than the energy band gap (Eg(106b)) of the second upper cladding layer (106b), which is larger than the energy band gap (Eg(105)) of the active layer (105). One of a patterned layer, an dielectric interlayer (109) has an etched region at a predetermined area thereof so that at least a part of the upper cladding layer (106) or a second conductive type semiconductor region (108) is exposed.
    Type: Application
    Filed: December 19, 2002
    Publication date: July 3, 2003
    Inventors: Mitsuhiko Ogihara, Hiroshi Hamano, Masumi Taninaka
  • Patent number: 6583446
    Abstract: An array of light emitting elements, formed as regions of a second conductive type in a semiconductor layer of a first conductive type, includes at least one emission-altering element provided for the purpose of altering the amount of light emitted by an adjacent light-emitting element. The emission-altering element may be a trench, an opaque member, or a non-emitting region of the second conductive type. Light-emitting elements in the interior of the array can be made to emit the same amount of light as the light-emitting elements at the ends of the array by placing one emission-altering element between at least every second pair of mutually adjacent light-emitting elements. If the array is divided into blocks, the emission-altering elements can also provide electrical isolation between the blocks.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: June 24, 2003
    Assignee: Oki Data Corporation
    Inventors: Masumi Taninaka, Hiroaki Kikuchi, Mitsuhiko Ogihara, Hiroshi Hamano
  • Publication number: 20030090363
    Abstract: A vehicle sharing system is provided that, in rental places adjacent to various facilities within a leisure facility, enables a user to exchange a plurality of kinds of shared vehicles as required within a short time and without complicated rental processing.
    Type: Application
    Filed: September 29, 1999
    Publication date: May 15, 2003
    Inventors: MASAMI OGURA, YOSHINORI MITA, MASAO TATSUTA, HIROSHI HAMANO, SHINZOU URUSHIDANI, TOMOHIDE SHIMIZU, NOZOMU SAIBARA, MICHIO FUJINUMA, TAKASHI UEHARA
  • Publication number: 20030039328
    Abstract: Disclosed is a timing circuit for generating a clock signal which indicates a timing for discriminating a data signal. The timing circuit includes a branching circuit for branching a data signal in two directions, a duty monitoring circuit for monitoring the duty of a first data signal output from the branching circuit, a duty varying circuit for varying the duty of a second data signal output from the branching circuit, a control circuit for controlling the duty varying circuit on the basis of the duty information output from the duty monitoring circuit so that the duty of the data signal to be output has a predetermined value and a clock signal generator for generating the clock signal for discriminating a data signal which is synchronous with the data signal output from the duty varying circuit.
    Type: Application
    Filed: October 10, 2002
    Publication date: February 27, 2003
    Applicant: Fujitsu Limited
    Inventors: Hiroaki Tomofuji, Hiroshi Hamano
  • Patent number: 6525563
    Abstract: The present invention relates to a technology of a crosspoint switch circuit applied to a cross-connect apparatus, an ADM or the like employed in an optical network.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: February 25, 2003
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Hamano, Takuji Yamamoto, Satoshi Kuroyanagi
  • Publication number: 20030007224
    Abstract: It is aimed at providing an optical receiving apparatus and an optical receiving method, which can assuredly receive and process signal lights having different transmission rates, by a simple and single device. To this end, the signal light received by the present optical receiving apparatus is converted into an electric signal by a light receiving element and thereafter sent to an equalizing amplifier whereby the signal is amplified. The transmission rate of this received signal is detected by a transmission rate detecting part, and a band of the equalizing amplifier is optimally controlled by an equalizing band controlling part, corresponding to the detected transmission rate. In case of adopting a PLL (phase-locked loop) circuit as a clock generating circuit, there is also controlled a band of a loop filter corresponding to the transmission rate detected by the transmission rate detecting part.
    Type: Application
    Filed: September 5, 2002
    Publication date: January 9, 2003
    Applicant: Fujitsu Limited
    Inventors: Katsuya Yamashita, Takeshi Ihara, Hiroshi Hamano
  • Patent number: 6498670
    Abstract: It is aimed at providing an optical receiving apparatus and an optical receiving method, which can assuredly receive and process signal lights having different transmission rates, by a simple and single device. To this end, the signal light received by the present optical receiving apparatus is converted into an electric signal by a light receiving element and thereafter sent to an equalizing amplifier whereby the signal is amplified. The transmission rate of this received signal is detected by a transmission rate detecting part, and a band of the equalizing amplifier is optimally controlled by an equalizing band controlling part, corresponding to the detected transmission rate. In case of adopting a PLL (phase-locked loop) circuit as a clock generating circuit, there is also controlled a band of a loop filter corresponding to the transmission rate detected by the transmission rate detecting part.
    Type: Grant
    Filed: July 21, 1998
    Date of Patent: December 24, 2002
    Assignee: Fujitsu Limited
    Inventors: Katsuya Yamashita, Takeshi Ihara, Hiroshi Hamano
  • Patent number: 6496552
    Abstract: Disclosed is a timing circuit for generating a clock signal which indicates a timing for discriminating a data signal. The timing circuit includes a branching circuit for branching a data signal in two directions, a duty monitoring circuit for monitoring the duty of a first data signal output from the branching circuit, a duty varying circuit for varying the duty of a second data signal output from the branching circuit, a control circuit for controlling the duty varying circuit on the basis of the duty information output from the duty monitoring circuit so that the duty of the data signal to be output has a predetermined value and a clock signal generator for generating the clock signal for discriminating a data signal which is synchronous with the data signal output from the duty varying circuit.
    Type: Grant
    Filed: March 13, 1998
    Date of Patent: December 17, 2002
    Assignee: Fujitsu Limited
    Inventors: Hiroaki Tomofuji, Hiroshi Hamano
  • Publication number: 20020171451
    Abstract: The present invention relates to a technology of a crosspoint switch circuit applied to a cross-connect apparatus, an ADM or the like employed in an optical network.
    Type: Application
    Filed: December 20, 1999
    Publication date: November 21, 2002
    Applicant: FUJITSU LIMITED
    Inventors: HIROSHI HAMANO, TAKUJI YAMAMOTO, SATOSHI KUROYANAGI
  • Patent number: 6407410
    Abstract: A light emitting diode in accordance with the present invention has a p-n junction which is formed by selectively implanting an impurity from the surface of a semiconductor substrate, and also has an etched groove which is formed in the p-n junction area near the surface of the substrate. In the area where the etched groove is formed, the p-type area and the n-type area are spatially separated in the region of the substrate, therefore the movement of minority carriers does not occur. As a consequence, in the light emitting diode in accordance with the present invention, the movement of minority carriers in the p-n junction interface occurs at a deeper position of the semiconductor substrate. In a deep position of the semiconductor substrate, the recombination rate of minority carriers is high. Therefore if the recombination of minority carriers is increased in a deep position, the emission efficiency of the light emitting diode increases.
    Type: Grant
    Filed: April 14, 1999
    Date of Patent: June 18, 2002
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Mitsuhiko Ogihara, Yukio Nakamura, Hiroshi Hamano, Masumi Taninaka
  • Publication number: 20020067786
    Abstract: Disclosed is a timing circuit for generating a clock signal which indicates a timing for discriminating a data signal. The timing circuit includes a branching means for branching a data signal in two directions, a duty monitoring means for monitoring the duty of a first data signal output from the branching means, a duty varying means for varying the duty of a second data signal output from the branching means, a control circuit for controlling the duty varying means on the basis of the duty information output from the duty monitoring means so that the duty of the data signal to be output has a predetermined value and a clock signal generator for generating the clock signal for discriminating a data signal which is synchronous with the data signal output from the duty varying means.
    Type: Application
    Filed: March 13, 1998
    Publication date: June 6, 2002
    Inventors: HIROAKI TOMOFUJI, HIROSHI HAMANO